Developer Guide

Intel oneAPI DPC++/C++ Compiler Handbook for Intel FPGAs

ID 785441
Date 5/08/2024
Public

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Document Table of Contents

Optimization Targets

This section describes the FPGA optimization targets the Intel® oneAPI DPC++/C++ Compiler supports. It covers multiple FPGA performance metrics, such as latency, throughput, and area. The current release supports minimum latency and maximum throughput without area optimization heuristics optimization targets. In future oneAPI releases, Intel plans to add support for more optimization targets.

NOTE:

The manual controls described in the optimization targets that follow are beneficial in overriding one or more of the underlying controls without affecting other underlying controls that the -⁠Xsoptimize=<target> compiler flag implies.

TIP:

For additional information, refer to the FPGA tutorial sample "Optimization Targets" listed in the Intel® oneAPI Samples Browser on Linux* or Windows*, or access the code sample in GitHub.