Visible to Intel only — GUID: GUID-2841A4B1-44FC-4CB0-B6E4-8AA3B211BD1A
Visible to Intel only — GUID: GUID-2841A4B1-44FC-4CB0-B6E4-8AA3B211BD1A
cachesim-sets
Set the cache set size (in bytes) for modeling CPU cache behavior during Memory Access Patterns analysis.
GUI Equivalent
Project Properties > Analysis Target > Memory Access Patterns Analysis > Advanced > Cache sets
Syntax
--cachesim-sets=<integer> |
Arguments
<integer> is in bytes: 256 | 512 | 1024 | 2048 | 4096 | 8192
Default
4096
Actions Modified
collect=map --enable cache-simulation
Usage
Cache simulation modeling applies to the following:
Memory Access Patterns analysis - This basic simulation functionality models accurate memory footprints, miss information, and cache line utilization for a downstream Memory Access Patterns report.
CPU / Memory Roofline Insights perspective - This enhanced simulation functionality models multiple levels of cache for a downstream Memory-Level Roofline chart or Roofline interactive HTML report.
This option is applicable only to Memory Access Patterns analysis.
Example
Run a Memory Access Patterns analysis. Model cache misses for 2048-byte cache set size, default cache associativity and cache line size.
advisor collect=map --enable-cache-simulation --cachesim-sets=2048 --cachesim-mode=cache-misses --project-dir=./advi_results -- ./myApplication