External Memory Interfaces (EMIF) IP User Guide: Agilex™ 5 FPGAs and SoCs

ID 817467
Date 4/01/2024
Public

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4.3.3. usr_async_clk for EMIF

User clock interface

Table 44.  Interface: usr_async_clkInterface type: clock
Port Name Direction Description
usr_async_clk input User clock