Triple-Speed Ethernet Intel® FPGA IP User Guide: Agilex™ 5 FPGAs and SoCs

ID 813669
Date 4/01/2024
Public

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4.1.6.2. Transmit Thresholds

Figure 16. Transmit FIFO Thresholds


Table 19.  Transmit Thresholds
Threshold Register Name Description
Almost empty tx_almost_empty The number of unread entries in the FIFO buffer before the buffer is empty. When the level of the FIFO buffer reaches this threshold, the MAC function asserts the ff_tx_a_empty signal. The MAC function stops reading from the FIFO buffer and sends the Ethernet frame with GMII/MII/RGMII error to avoid FIFO underflow.
Almost full tx_almost_full The number of unwritten entries in the FIFO buffer before the buffer is full. When the level of the FIFO buffer reaches this threshold, the MAC function asserts the ff_tx_a_full signal. The MAC function deasserts the ff_tx_rdy signal to backpressure the Avalon® streaming transmit interface.
Section empty tx_section_empty An early indication that the FIFO buffer is getting full. When the level of the FIFO buffer reaches this threshold, the MAC function deasserts the ff_tx_septy signal. This threshold can serve as a warning about potential FIFO buffer congestion.
Section full tx_section_full This threshold indicates that there are sufficient entries in the FIFO buffer to start frame transmission.

Set this threshold to 0 to enable store and forward on the transmit path. When you enable the store and forward mode, the MAC function forwards each frame as soon as it is completely written to the transmit FIFO buffer.