Intel® Simics® Simulator for Intel® FPGAs: Agilex™ 5 E-Series Virtual Platform User Guide

ID 786901
Date 8/08/2024
Public
Document Table of Contents

2.1.1.4. qsys_top Component

The qsys_top component matches the design's top view being modeled and corresponds to the system seen from the Platform Designer under the GHRD (soc_inst instance). The HPS subsystem component and the components included as part of the FPGA fabric design are instantiated under the qsys_top component.

The qsys_top component is modeled as a Python script named sm_ghrd_qsys_top_comp.py.

The following image shows a block diagram of this component:

Figure 4.  qsys_top Component Block Diagram

The hierarchical name of the qsys_top component in the virtual platform is system.board.fpga.soc_inst.