Intel® Simics® Simulator for Intel® FPGAs: Agilex™ 5 E-Series Virtual Platform User Guide

ID 786901
Date 8/08/2024
Public
Document Table of Contents

A. Document Revision History

Document Version Intel® Simics® Simulator for Intel® FPGAs Version Changes
2024.08.08 24.2
  • Replaced references to RocketBoards.org with references to altera-fpga-github.io.
2024.07.08 24.2
  • Revised block diagram in Agilex™ 5 E-Series Universal Virtual Platform Overview.
  • Revised Agilex™ 5 HPS Component.
  • Revised Boot-To-Operating System Prompt.
  • Revised block diagram in Agilex™ 5 E-Series HPS Intel® Simics® Model Architecture.
  • Revised Additional Agilex™ 5 E-Series HPS Components.
  • Revised ONFI NAND Memory Device.
  • Revised SPI Flash Device.
  • Revised block diagram in Modeling Support Limitations.
  • Revised Troubleshooting Issues When Migrating Software from Intel® Simics® to Hardware
2024.04.01 24.1
  • Revised the block diagram in Agilex™ 5 E-Series Universal Virtual Platform Overview.
  • Revised the information for "HPS-to-FPGA Bridges" and "USB Controllers" in HPS Component.
  • Revised the existing information and added "Peripheral Subsystem Interrupts Connection" diagram in FPGA Fabric Design.
  • Revised the information for some of the existing parameters and added stepping parameter to the table in Agilex™ 5 E-Series Universal Virtual Platform User-Configurable Parameters.
  • Revised the information in USB Disks Hot-Plug Support.
  • Revised the information entirely in On-Chip Memory IP FPGA Fabric Example Design.
  • Added Exercising Peripheral Subsystem in FPGA Fabric Design.
  • Added USB Controller Host/Device Mode Configuration.
  • Added B0 Silicon Features Selection.
  • Added Agilex™ 5 E-Series B0 Features Support.
  • Revised the information entirely in FPGA Fabric.
  • Made minor updates to USB Disk Device.
  • Added Modeling Support Limitations.
  • Added Troubleshooting Issues When Migrating Software from Intel® Simics® to Hardware
2023.12.04 23.4
  • Updated the block diagram in Agilex™ 5 E-Series Universal Virtual Platform Overview.
  • Added "FPGA Bridges" block to the Agilex™ 5 HPS Component.
  • Added the "FPGA Bridge memory spaces" component and updated the block diagram in FPGA Fabric Design.
  • Updated the block diagram in qsys_top Component.
  • Updated the NAND Flash Device parameters in Board Component.
  • Revised the information in USB Disks Hot-Plug Support.
  • Added FPGA-To-HPS Bridges.
  • Removed a limitation for USB 3.1 Gen 1 and added a limitation for Ethernet/TSN in PSS Subsystem Components.
  • Added a limitation for MPU Subsystem in MPU and APS Subsystem.
  • Added limitations for most of the components in Additional Agilex™ 5 E-Series HPS Components.
  • Added "FPGA Bridges memory spaces" component in FPGA Fabric.
  • Revised the parameter values in ONFI NAND Memory Device.
  • Added a limitation in Agilex™ 5 E-Series Virtual Platform Component Intel® Simics® Models.
2023.10.02 23.3
  • Rebranded all occurrences of "Simics" as "Intel Simics."
  • Made several editorial fixes in all topics.
  • Fixed branding errors of some third-party products.
  • Fixed formatting issues in several topics.
  • Updated List of Acronyms.
  • Updated the list of components and their descriptions in Intel Agilex 5 E-Series Intel Simics Virtual Platform.
  • Updated the image in Intel Agilex 5 E-Series Universal Virtual Platform Overview.
  • Enhanced the description and added SPI Controller functional block in Intel Agilex 5 E-Series Universal Virtual Platform Overview.
  • Enhanced the description and block diagram in FPGA Component and Board Component.
  • Added HPS component to Target Script.
  • Added additional parameters to Intel Agilex 5 E-Series Universal Virtual Platform User- Configurable Parameters.
  • Added a note and updated the parameters in Boot-To-Operating System Prompt.
  • Revised the information in Intel Agilex 5 HPS Component.
  • Revised the topic title of FPGA Fabric Example Design to On-Chip Memory IP FPGA Fabric Example Design.
  • Enhanced the information in Reset Flow and FPGA Fabric Example Design.
  • Updated the HPS subsystems image in Agilex™ 5 E-Series HPS Intel® Simics® Model Architecture
  • Updated the limitation and object names in PSS Subsystem Components
  • Updated the object names in MPU and APS Subsystem, MPFE Subsystem, Additional Intel Agilex 5 E-Series HPS Components, and External Memory Interface (EMIF).
  • Renamed the topic title Virtual Platform FPGA Components to Virtual Platform HPS Subsystem Components.
  • Updated the components, limitations, and object names in Security Device Manager (SDM).
  • Renamed the topic title QSPI Flash Device to SPI Flash Device.
  • Updated all the command outputs in Getting Device Information from the Intel Simics Model.
  • Added an image in General Purpose I/O (GPIO) Loopback.
  • Added the following new topics:
    • HPS Subsystem Component
    • FPGA Fabric Design
    • qsys_top Component
    • Virtual Platform qsys_top Components
    • FPGA Fabric
    • Intel® Simics® Text Console
2023.06.26 23.2
  • Updated HPS Component.
  • Updated Board Component.
  • Updated User Configurable Parameters.
  • Added the following sections for new virtual platform board components:
    • AT24Cxx EEPRom Device
    • I3C Device
    • USB Disk Device
  • Updated block diagrams in the following topics:
    • Agilex™ 5 E-Series Universal Virtual Platform Overview
    • FPGA Component
    • Board Component
2024.04.03 23.1
  • Initial release