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1. About This Document
2. Agilex™ 5 E-Series Intel® Simics® Virtual Platforms
3. Agilex™ 5 E-Series Virtual Platform Component Intel® Simics® Models
4. Running a Simulation with the Agilex™ 5 E-Series HPS Model
5. Supported Use Cases
6. Troubleshooting Issues When Migrating Software from Intel® Simics® to Hardware
A. Document Revision History
2.1.3.1. Boot-To-Operating System Prompt
2.1.3.2. Basic Ethernet
2.1.3.3. CPU Power-On and Boot Core Selection
2.1.3.4. Reset Flow
2.1.3.5. General Purpose I/O (GPIO) Loopback
2.1.3.6. USB Disks Hot-Plug Support
2.1.3.7. On-Chip Memory IP FPGA Fabric Example Design
2.1.3.8. FPGA-to-HPS Bridges
2.1.3.9. Exercising Peripheral Subsystem in FPGA Fabric Design
2.1.3.10. USB Controller Host/Device Mode Configuration
2.1.3.11. B0 Silicon Features Selection
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A. Document Revision History
Document Version | Intel® Simics® Simulator for Intel® FPGAs Version | Changes |
---|---|---|
2024.08.08 | 24.2 |
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2024.07.08 | 24.2 |
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2024.04.01 | 24.1 |
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2023.12.04 | 23.4 |
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2023.10.02 | 23.3 |
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2023.06.26 | 23.2 |
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2024.04.03 | 23.1 |
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