Intel® Simics® Simulator for Intel® FPGAs: Intel Agilex® 5 E-Series Virtual Platform User Guide

ID 786901
Date 12/04/2023
Public

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2.1.1.2. HPS Subsystem Component

The HPS subsystem component corresponds to the model of the module that integrates all components associated with the HPS in the Intel Agilex® 5 E-Series device. It includes the HPS models, SDM mailbox, and EMIF model. A brief description of the components that integrate the HPS subsystem component is provided in the following table:
Table 3.  Components That Integrate the HPS Subsystem Component
Component Description
HPS Component The HPS component block is described in Intel Agilex 5 HPS Component.
EMIF Component Models an instance of the External Memory Interfaces (EMIF) for HPS Intel FPGA IP.
SDM Component Implements a limited functionality of the Security Device Manager (SDM) allowing servicing messages sent by the HPS component. It also includes the QSPI controller that is shared between SDM and HPS.

This component is implemented as a Python script named sm_ghrd_subsys_hps_comp.py.