Intel® Simics® Simulator for Intel® FPGAs: Intel Agilex® 5 E-Series Virtual Platform User Guide

ID 786901
Date 12/04/2023
Public

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Document Table of Contents

2.1.3.8. FPGA-to-HPS Bridges

The FPGA-To-HPS bridges provide a way in which the FPGA fabric IPs can interact with the HPS subsystem and the SDRAM. The bridge implementation includes two new memory spaces in the FPGA logic model that are used to send read and write transactions to the HPS or SDRAM component from the FPGA logic passing through the FPGA-to-HPS bridges.
  • FPGA to HPS bridge (FPGA2HPS): Connects the FPGA2HPS memory space with the HPS component.
  • FPGA to SDRAM bridge (FPGA2SDRAM): Connects the F2SDRAM memory space with the HPS component.

You can send read and write transactions through each one of the bridges from the Intel® Simics® CLI, as shown in the following table:

Bridge Command
FPGA2HPS Write: system.board.fpga.soc_inst.fpga2hps_mem_space.write address = <address> value = <value>
Read: system.board.fpga.soc_inst.fpga2hps_mem_space.read address = <address>
F2SDRAM Write: system.board.fpga.soc_inst.f2sdram_mem_space.write address = <address> value = <value>
Read: system.board.fpga.soc_inst.f2sdram_mem_space.read address = <address>