Intel® Simics® Simulator for Intel® FPGAs: Intel Agilex® 5 E-Series Virtual Platform User Guide

ID 786901
Date 12/04/2023
Public

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Document Table of Contents

2.1.3.3. CPU Power-On and Boot Core Selection

The virtual platform supports the configuration of the CPU power-on settings and the CPU boot core selection.

This configuration is defined at the target script level with the following parameters:
  • hps_boot_core
  • hps_core0_1_power_on
  • hps_core2_power_on
  • hps_core3_power_on

These parameters correspond to the similar parameters set in the Hard Processor System Intel Agilex® 5 FPGA IP.

Based on the CPU power and boot configuration, the virtual platform exposes only the appropriate number of cores available to the target software. The virtual platform supports symmetric multiprocessing (SMP) when multiple CPUs are enabled.