Nios® V Processor Software Developer Handbook

ID 743810
Date 7/08/2024
Public
Document Table of Contents

9.5.1.6. Use Fast Memory

ISR performance depends on memory speed.

For best performance, place the ISRs and the stack in the fastest available memory: preferably tightly-coupled memory (if available), or on-chip memory.

If it is not possible to place the main stack in fast memory, consider using a separate exception stack, mapped to a fast memory section, as described in the next section.

For more information about mapping memory, refer to Memory Usage chapter.