Nios® V Processor Software Developer Handbook

ID 743810
Date 7/08/2024
Public
Document Table of Contents

7.11.1. Apply Compiler Flags

riscv32-unknown-elf-gcc is the provided RISC-V toolchain in the Ashling* RiscFree* IDE for Intel® FPGAs. Compiler switch may be of use when optimizing code for small RAM footprints. These switches can be set in the BSP Editor GUI settings for small code footprints.

Table 31.  Compiler Switch
Compiler Switch Value Description
hal.make.cflags_optimization
  • -Os
  • -O0
  • -O1
  • -O2
  • -O3
  • -Os
  • -Ofast
  • -Og
  • -Oz
Instructs the toolchain to improve performance or code size, or both.
Note: You must enable CMAKE_BUILD_TYPE=Release when running cmake command.
hal.make.cflags_user_flags -ffunction-sections -fdata-sections Instructs the toolchain to enable dead code optimization and remove idle sections.
hal.make.link_flags -Wl,--gc-sections Instructs the toolchain to enable dead code optimization and remove idle sections.