F-Tile Low Latency Ethernet 10G MAC Intel® FPGA IP User Guide

ID 720985
Date 4/18/2024
Public
Document Table of Contents

4.10.3. RX Datapath

In the RX datapath, the IEEE 1588v2 feature provides a timestamp for all receive frames. The timestamp is aligned with the avalon_st_rx_startofpacket signal.