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1. Introduction
2. Interface Overview
3. Parameters
4. Designing with the IP Core
5. Block Description
6. Cryptographic IP Data Profiles
7. Configuration Registers
8. Design Example
9. Symmetric Cryptographic Intel FPGA Hard IP User Guide Archives
10. Document Revision History for the Symmetric Cryptographic Intel FPGA Hard IP User Guide
4.1. Installing and Licensing Intel® FPGA IP Cores
4.2. Specifying the IP Core Parameters and Options
4.3. Generated File Structure
4.4. Symmetric Cryptographic IP Core Flow
4.5. Dynamically Disabling SM4 Capability
4.6. Error Handling
4.7. Error Reporting
4.8. Resetting the IP Core
4.9. Channel Definition and Allocation
4.10. Byte Ordering
4.11. AXI-ST Single Packet Mode
4.12. AXI-ST Multiple Packet Mode
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5.4. Integrity Check Value Comparison
The Integrity Check Value (ICV) comparison checks the authentication tag during the packet's decryption. The Symmetric Cryptographic IP core performs the ICV comparison.
Figure 13. ICV Comparison Block and Signals
Follow these steps when performing ICV comparison:
- You send a packet for decryption. To indicate decryption operation, you set the tuser.encrypt_decrypt appropriately.
- You send the authentication tag together with the packet when the tlast signal is asserted.
- The soft logic receives the authentication tag (ICV) and stores it in a FIFO and sends the packet for to the AES/SM4 Inline Cryptographic Accelerator for decryption.
- When the decryption completes, the AES/SM4 Inline Cryptographic Accelerator asserts the tuser.mac_iv_tweak_en signal. The tdata[127:0] contains the MAC output from the AES/SM4 Inline Cryptographic Accelerator. The soft logic then compares it with the stored authentication tag.
- A difference between received and stored authentication tags results in the tuser.auth_err signal assertion.