Visible to Intel only — GUID: nlf1678152697914
Ixiasoft
Visible to Intel only — GUID: nlf1678152697914
Ixiasoft
7. Configuration Registers
You can access the cryptographic registers for the Symmetric Cryptographic FPGA Hard IP core using the AXI-Lite interface. These registers use 32-bit addresses.
When an AXI-Lite transaction targets an out-of-range or unspecified address, write or read operations have an undefined effect. Such accesses should be avoided. For supported addresses, write operations to a read-only register field have no effect. Read operations that address a Reserved register return an unspecified result. Write operations to Reserved registers have an undefined effect.
For more information about specific AXI-Lite interface address register descriptions, refer to Symmetric Cryptographic Intel FPGA IP Register Map.