DSP Builder for Intel® FPGAs (Advanced Blockset): Handbook

ID 683337
Date 5/27/2022
Public

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14.1.4. External Memory, Memory Read, Memory Write

The DSP Builder External Memory block specifies characteristics of external memory and related Avalon-MM interfaces. DSP Builder uses this information to set bit widths on related interface ports in simulation, generated HDL and to build an external memory simulation model. The Memory Read and Memory Write blocks provide (read or write) access to associated external memory models in simulation. In HDL, each of these blocks is driving dedicated Avalon memory-mapped host interface. Associate read and write ports with External Memory blocks using identifiers. Connect these interfaces to a DDR3 SDRAM controller in your system-level design in Platform Designer.

Always add the External Memory block to the top-level of your DSP Builder design (similar to Control or Signals blocks).

Your design can have several instances of these blocks, but you must give them separate identifiers. DSP Builder creates a separate simulation model for each of these blocks.

Table 71.  External Memory Block Parameters
Parameter Values Description
Identifier Numeric value A unique identifier for External Memory block that you should set on Memory Read or Memory Write block to associate these blocks with the External Memory block.
Avalon-MM Interface Data Width

A valid Avalon-MM interface data width value.

Should be power of 2.

The width of the data signal in the generated Avalon memory-mapped host interfaces for associated Memory Read and Memory Write blocks.

Set the data ports on these blocks to the same width.

Memory Data Width

Should be less than or equal to Avalon-MM Interface Data Width.

The ratio between these two widths should be a power of 2.

The data width of the actual external memory.

Only use to calculate the size of the memory which affects the width of address bus.

Set this parameter to a quarter of the Avalon MM Interface Data Width parameter to define DDR memory operating at half rate.

Number of Rows

Numeric value.

Should be power of 2.

The number of rows, columns, and banks of the actual physical memory that you connect to the DSP Builder design.

Carefully chose access patterns based on these values to get the best performance of external memory.

Number of Columns
Number of Banks
Memory Size Read-Only parameter

This parameter displays the size of the external memory based on the specified number of rows, columns, banks and memory data width.

DSP Builder uses the following equation:

memory_size = rows * columns * banks * memory_data_width

The width of the address bus on Avalon memory-mapped host interfaces generated for associated Memory Read and Memory Write blocks, and the width of address input on these blocks, is:

address_width = log2(memory_size)

Table 72.  Parameters that Only Affect Simulation
Parameter Values Description
Signal Busy for Specified Amount of Simulation Time (%)

off

12.5, 25, 50, 75, 87.5

Any value other than off forces external memory simulation model into a busy state (the model refuses read or write requests) at random points during simulation.

The actual value limits the overall busy time compared to design simulation time.

The busy state of the memory model will be indicated with low value on ready ports for associated Memory Read or Memory Write blocks.

If this feature is enabled, you may need to increase overall simulation time in order to get all requests to external memory through. Longer simulation time will be required for higher limits.

Show Diagnostic ports Boolean switch Turn on this option to add diagnostic ports, to External Memory blocks, which display the state of the simulation model.
Dump Memory Region into File Boolean switch

Turn on so the External Memory block dumps its content for the specified region into a file.

Each Avalon MM Interface Data Width value occupies a line in the file and is printed as a sequence of 8-bit decimal values.

For External Memory blocks with Avalon MM Interface Data Width set to 16, the lines in the dump file have the following format

a[7:0] a1[15:8]

Dump File Name Valid file name

The name of the dump file with extension (DSP Builder does not add an extension)

The dump file is created in the current directory.

Dump Region Start Address Valid word address The start address of the region in external memory that should be dumped.
Dump Region Size Non negative number The number of words that should be dumped starting with the specified address.
Memory Initialization Start Address A valid word address
Memory Initialization Data A 1-D or 2-D matrix

DSP Builder writes this data to the memory from the Start Address. DSP Builder does not convert the data type. You must use the data type you want. The type must be:

  • single
  • double
  • INT8
  • UINT8
  • INT16
  • UINT16
  • INT32
  • UINT32
  • INT64
  • UINT64

Where the Avalon-MM interface data width is wider than the data type, DSP Builder packs the initialization data into the words first, before moving on to the next address. You can use a 2-D matrix, where each column represents an address in the memory and each row represents a bit-slice in the word.

Table 73.  External Memory Block Diagnostic PortsYou can enable these ports through dedicated parameters.
Name Direction Type Description
reading Output Boolean High when external memory model is performing reading operation; otherwise low.
writing Output Boolean High when external memory model is performing writing operation; otherwise low.
busy Output Boolean High when external memory model is in busy state; otherwise low.

Memory Read Block

This block is an access point for reading from the associated External Memory block. It provides a simple interface with ready and valid based handshaking for reading. In generated HDL, use this block as an adapter between the provided interface and the Avalon memory-mapped host interface. You can place these blocks at any level of hierarchy under the DSP Builder device level block. The design can contain several of these blocks, with each of the blocks accessing the associated External Memory block.

Table 74.  Memory Read Parameters
Parameter Values Description
Identifier One of identifiers set for External Memory blocks in the design Set to match an identifier on one of the External Memory blocks in the design.
Maximum Burst Size

off

2, 4, 8, 16, 32, 64, 128, 256, 512, 1024

If the value is set to off, DSP Builder does not allow burst requests.

For other values, DSP Builder adds a new port to specify an actual size (less than or equal specified Maximum Burst Size) for each burst request.

Table 75.  Memory Read Ports
Name Direction Type Description
read Input Boolean Set this port to high to indicate a new read request.
address Input Unsigned Integer

Sets the address for the request.

The width of this port is: log2(memory_size), memory_size is the size of associated External Memory.

burstcount Input Unsigned Integer

Optional. DSP Builder adds if Maximum Burst Count is not off.

Sets the actual number of bursts for the read request.

If you initiate a burst request, update this port and the read and address ports once at the beginning of request.

The width of this port is:

log2(max_burst_count) + 1

valid Output Boolean Indicates that the valid response is available on the data port.
ready Output Boolean

Indicates that the block (associated memory) is ready to accept new request.

Do not update input ports if this value is low.

data Output Unsigned Integer

Contains the read data.

The width of this port is based on the Avalon MM Interface Data Width parameter of the associated External Memory.

Memory Write Block

This block is an access point for writing to the associated external memory model. It provides a simple interface with ready and valid based handshaking for writing. In generated HDL, this block is an adapter between the provided interface and the actual Avalon memory-mapped host interface. Place these blocks at any level of hierarchy under DSP Builder device level block. The design can contain several of these blocks, with each of the blocks accessing the associated External Memory block.

Table 76.  Memory Write Parameters
Parameter Values Description
Identifier One of identifiers set for External Memory blocks in the design Set to match an identifier on one of the External Memory blocks in the design.
Byte Enables Boolean width

Activate this parameter to use byte enables for the write request.

If enabled, DSP Builder adds a separate port to provide byte enable values.

Maximum Burst Size

off

2, 4, 8, 16, 32, 64, 128, 256, 512, 1024

If the value is set to off, DSP Builder does not allow burst requests.

For any other values, DSP Builder adds a new port to specify an actual size (less than or equal specified Maximum Burst Size) for each burst request.

If you initiate a burst write, External Memory blocks ignore subsequent addresses until the burst is completed.

When a burst write is in progress, DSP Builder queues the read and write requests from associated Memory Read and Memory Write blocks until the write burst is completed.

Table 77.  Memory Write Ports
Name Direction Type Description
write Input Boolean Set this port to high to indicate new write request to associated External Memory blocks.
address Input Unsigned integer

Sets the address for write request.

The width of this port is the Avalon MM Interface Data Width parameter value on the associated External Memory block.

data Input Unsigned integer

Sets the write data.

The width of this port is: log2(memory_size), memory_size is the size of associated External Memory.

byteenable Input Unsigned integer

Optional. DSP Builder adds byteenable when the Byte Enables parameter is on.

Sets the byte enables for write data.

The width of this port is:

data_port_width / 8

burstcount Input Unsigned integer

Optional. DSP Builder adds burstcount when the Maximum Burst Count parameter is not off.

Sets the actual burst count for burst write requests.

When you initiate a burst request, ensure you update the address port and this port once at the beginning of request. Update the write port every time you update the data port to supply the next portion of burst data. For example, if you provide a new portion of data every cycle, keep the write port high throughout the burst.

The width of this port is set as:

log2(mac_burst_count)+1

ready Output Boolean

Indicates whether the block is ready to accept a new write request or a continuation of ongoing burst request.

Do not update input ports if this output is low.