DSP Builder for Intel® FPGAs (Advanced Blockset): Handbook

ID 683337
Date 5/27/2022
Public

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Document Table of Contents

2.3. DSP Builder for Intel® FPGAs Libraries

Table 1.  Block TypesThis table describes the types of blocks that DSP Builder offers.
Block Type Description
Configuration blocks Blocks that configure how DSP Builder synthesizes the design or subsystem
Low-level building blocks (primitives) Basic operator, logic, and memory primitive blocks for scheduled subsystems delimited by boundary configuration blocks (primitive subsystems).
Common design elements Common functions for parameterizable subsystems of primitives and within scheduled subsystems delimited by boundary configuration blocks
IP function-level functions (IP) Stand-alone IP-level blocks comprising functions such as entire FFTs, FIRs and NCOs. Use these blocks only outside of primitive subsystems.
System interface blocks Blocks that expose Avalon-ST and Avalon-MM interfaces for interaction with other IP (such as external memories) in Platform Designer.
Non-synthesizable blocks Blocks that play no part in the synthesized design. For example, blocks that provide testbench stimulus, blocks that provide information, or enable design analysis.
Table 2.  Simulink LibrariesThis table lists the Simulink libraries and describes the DSP Builder blocks in those libraries
Library Description
Design Configuration Blocks that set the design parameters, such as device family, target fMAX and bus interface signal width.
Primitives Blocks for primitive subsystems.
Primitives > Primitive Configuration Blocks that change how DSP Builder synthesizes primitive subsystems, including boundary delimiters.
Primitives > Primitive Basic Blocks Low-level functions.
Primitives > Primitive Design Elements Configurable blocks and common design patterns built from primitive blocks.
Primitives > FFT Design Elements Configurable FFT component blocks built from primitive blocks. Use in primitive subsystems to build custom FFTs.
IP Full IP functions. Use outside of primitive subsystems.
IP FFT IP Full FFT IP functions. These blocks are complete primitive subsystems. Click Look under the Mask to see how DSP Builder builds these blocks from the primitive FFT design elements.
IP > Channel Filter And Waveform Functions to construct digital up- and down-conversion chains: FIR, CIC, NCO, mixers, complex mixers, channel view, and scale IP.
Interfaces Blocks that set and use Avalon interfaces. DSP Builder treats design-level ports that do not route via Avalon interface blocks as individual conduits.
Interfaces > Memory Mapped Blocks that set and use Avalon-MM interfaces, including memory-mapped blocks, memory-mapped stimulus blocks, and external memory blocks.
Interfaces > Streaming Avalon-ST blocks.
Utilities Miscellaneous blocks that support building and refining designs
Utilities > Analyze And Test Blocks that help with design testing and debugging.
Utilities > Beta Blocks Blocks that are in development.