DSP Builder for Intel® FPGAs (Advanced Blockset): Handbook

ID 683337
Date 5/27/2022
Public

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15.4.15. Compare Less Than (CmpLT)

The CmpLT block outputs true if and only if the first input is less than the second input:

a < b

.

Table 174.  Port Interface for the CmpLT Block
Signal Direction Type Description Vector Data Support Complex Data Support
a Input Any fixed- or floating-point type Operand 1 Yes No
b Input Any fixed- or floating-point type Operand 2 Yes No
q Output Boolean Result Yes No