AN 798: Partial Reconfiguration with the Arria 10 HPS

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ID 683034
Date 1/25/2017
Public
Document Table of Contents
Document Table of Contents x
Partial Reconfiguration with the Intel® Arria® 10 HPS
Partial Reconfiguration with the Intel® Arria® 10 HPS x
Advantages of Partial Reconfiguration Scope of This Document Prerequisites for Using This Document Partial Reconfiguration Tools and Methods Arria 10 SoC Partial Reconfiguration Workflow Partial Reconfiguration Limitations Creating the PR Example Design Generating the Example Software Image Loading Partial Reconfiguration Designs Using Linux Important Partial Reconfiguration Terminology Revision History
Prerequisites for Using This Document x
Knowledge Prerequisites Software Tool Prerequisites Hardware Prerequisites
Partial Reconfiguration Tools and Methods x
Hardware Tools and Methods Software Tools and Methods
Hardware Tools and Methods x
Arria 10 SoC Partial Reconfiguration Support Overview of the Arria 10 GHRD
Arria 10 SoC Partial Reconfiguration Workflow x
Hardware Workflow Software Workflow
Creating the PR Example Design x
Qsys Partial Reconfiguration Freeze Logic Importing the GHRD Project Add a Partial Reconfiguration Region to the GHRD Building the Base Revision with the Reconfigurable Design Partition Synthesizing an Alternate Persona Implementing the Alternate Persona Generating the RBF FPGA Image Files Design Handoff to Software Developer
Qsys Partial Reconfiguration Freeze Logic x
PR Freeze Bridge PR Freeze Controller
Add a Partial Reconfiguration Region to the GHRD x
Creating the Partial Reconfiguration Design Adding the PR Region Connecting New Ports in the GHRD Module Instantiation
Generating the Example Software Image x
Overview of Software Image Creation Generating a New Boot Device Tree Creating the Device Tree Overlays
Generating a New Boot Device Tree x
Critical Information in the Default Device Tree Steps to Create a New Device Tree
Loading Partial Reconfiguration Designs Using Linux x
Installing Files on the SD Card Loading and Unloading the Device Tree Overlays
Partial Reconfiguration with the Intel® Arria® 10 HPS

Installing Files on the SD Card

The following steps show how to install your software on the SD card (created in "Hardware Prerequisites").
  1. Copy the pr_base.core.rbf and pr_base.periph.rbf files to the FAT partition of the SD card, overwriting the ghrd_10as066n2.core.rbf and ghrd_10as066n2.periph.rbf files that already exist at the directory root. This replaces the GHRD image provided by the GSRD SD card image with the default complete FPGA configuration image, which you created in the preceding steps.
  2. Copy the socfpga_arria10_socdk_sdmmc.dtb file to the FAT partition of the SD card, overwriting the socfpga_arria10_socdk_sdmmc.dtb file that already exists at the directory root. This replaces the GSRD boot device tree provided by the GSRD SD card image with the default PR enabled device tree from the Linux kernel source tree, which you created in the preceding steps.
  3. Copy the pr_region_default.rbf and pr_region_alt.rbf files to the /lib/firmware/ directory on the EXT3 partition of the SD card. When loading new firmware images using the device tree overlay, Linux searches this directory to find any named firmware files.
  4. Copy the base_static.dtbo, pr_region_default.dtbo and pr_region_alt.dtbo files to the /boot/ directory on the EXT3 partition of the SD card. This is the recommended location for PR DTB files.
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