rst_mgr Summary

Base Address: 0xFFD05000

Register Address Offset	Bit Fields
`i_rst_mgr_rstmgr`
`stat` `0x0`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`														`cdbgreqrst` `RW 0x0`	`fpgadbgrst` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`l4wd1rst` `RW 0x0`	`l4wd0rst` `RW 0x0`	`mpuwd1rst` `RW 0x0`	`mpuwd0rst` `RW 0x0`	`swwarmrst` `RW 0x0`	`fpgawarmrst` `RW 0x0`	`nrstpinrst` `RW 0x0`	`Reserved`		`swcoldrst` `RW 0x0`	`configiocoldrst` `RW 0x0`	`fpgacoldrst` `RW 0x0`	`nporpinrst` `RW 0x0`	`porfpgavoltrst` `RW 0x0`	`porhpsvoltrst` `RW 0x0`
`ramstat` `0x4`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`														`mpul1timeout` `RW 0x0`	`mpul1ramclr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`mwpramclr` `RW 0x0`	`qspiramclr` `RW 0x0`	`emac2rxramclr` `RW 0x0`	`emac2txramclr` `RW 0x0`	`emac1txramclr` `RW 0x0`	`emac1rxramclr` `RW 0x0`	`emac0txramclr` `RW 0x0`	`emac0rxramclr` `RW 0x0`	`nanderamclr` `RW 0x0`	`nandrramclr` `RW 0x0`	`nandwramclr` `RW 0x0`	`dmaramclr` `RW 0x0`	`sdmmcramclr` `RW 0x0`	`otg1ramclr` `RW 0x0`	`otg0ramclr` `RW 0x0`	`onchipramclr` `RW 0x0`
`miscstat` `0x8`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`etrstalltimeout` `RW 0x0`	`fpgahstimeout` `RW 0x0`	`fpgamgrhstimeout` `RW 0x0`	`sdrselfreftimeout` `RW 0x0`
`ctrl` `0xC`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`														`swwarmrstreq` `RW 0x0`	`swcoldrstreq` `RW 0x0`
`hdsken` `0x10`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`etrstallen` `RW 0x0`	`fpgahsen` `RW 0x0`	`fpgamgrhsen` `RW 0x0`	`sdrselfrefen` `RW 0x0`
`hdskreq` `0x14`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`etrstallreq` `RW 0x0`	`fpgahsreq` `RW 0x0`	`fpgamgrhsreq` `RW 0x0`	`sdrselfrefreq` `RW 0x0`
`hdskack` `0x18`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`							`etrstallwarmrst` `RW 0x0`	`Reserved`				`etrstallack` `RO 0x0`	`fpgahsack` `RO 0x0`	`fpgamgrhsack` `RO 0x0`	`sdrselfreqack` `RO 0x0`
`counts` `0x1C`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`warmrstcycles` `RW 0x80`								`Reserved`				`nrstcnt` `RW 0x800`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`nrstcnt` `RW 0x800`
`mpumodrst` `0x20`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`												`scuper` `RW 0x0`	`wds` `RW 0x0`	`cpu1` `RW 0x1`	`cpu0` `RW 0x0`
`per0modrst` `0x24`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`dmaif7` `RW 0x1`	`dmaif6` `RW 0x1`	`dmaif5` `RW 0x1`	`dmaif4` `RW 0x1`	`dmaif3` `RW 0x1`	`dmaif2` `RW 0x1`	`dmaif1` `RW 0x1`	`dmaif0` `RW 0x1`	`Reserved`	`emacptp` `RW 0x1`	`dmaocp` `RW 0x1`	`spis1` `RW 0x1`	`spis0` `RW 0x1`	`spim1` `RW 0x1`	`spim0` `RW 0x1`	`dma` `RW 0x1`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`sdmmcocp` `RW 0x1`	`qspiocp` `RW 0x1`	`nandocp` `RW 0x1`	`usb1ocp` `RW 0x1`	`usb0ocp` `RW 0x1`	`emac2ocp` `RW 0x1`	`emac1ocp` `RW 0x1`	`emac0ocp` `RW 0x1`	`sdmmc` `RW 0x1`	`qspi` `RW 0x1`	`nand` `RW 0x1`	`usb1` `RW 0x1`	`usb0` `RW 0x1`	`emac2` `RW 0x1`	`emac1` `RW 0x1`	`emac0` `RW 0x1`
`per1modrst` `0x28`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`					`gpio2` `RW 0x1`	`gpio1` `RW 0x1`	`gpio0` `RW 0x1`	`Reserved`						`uart1` `RW 0x1`	`uart0` `RW 0x1`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`			`i2c4` `RW 0x1`	`i2c3` `RW 0x1`	`i2c2` `RW 0x1`	`i2c1` `RW 0x1`	`i2c0` `RW 0x1`	`Reserved`		`sptimer1` `RW 0x1`	`sptimer0` `RW 0x1`	`l4systimer1` `RW 0x1`	`l4systimer0` `RW 0x1`	`watchdog1` `RW 0x1`	`watchdog0` `RW 0x1`
`brgmodrst` `0x2C`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`									`ddrsch` `RW 0x1`	`f2ssdram2` `RW 0x1`	`f2ssdram1` `RW 0x1`	`f2ssdram0` `RW 0x1`	`fpga2hps` `RW 0x1`	`lwhps2fpga` `RW 0x1`	`hps2fpga` `RW 0x1`
`sysmodrst` `0x30`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`									`ocramocp` `RW 0x0`	`sysdbg` `RW 0x0`	`s2f` `RW 0x0`	`fpgamgr` `RW 0x0`	`Reserved`	`ocram` `RW 0x0`	`rom` `RW 0x0`
`coldmodrst` `0x34`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`								`iomgrcold` `RW 0x0`	`hmccold` `RW 0x0`	`tapcold` `RW 0x0`	`timestampcold` `RW 0x0`	`s2fcold` `RW 0x0`	`Reserved`		`clkmgrcold` `RW 0x0`
`nrstmodrst` `0x38`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`nrstpinoe` `RW 0x0`
`dbgmodrst` `0x3C`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`dbg` `RW 0x0`
`mpuwarmmask` `0x40`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`wds` `RW 0x1`
`per0warmmask` `0x44`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`dmaif7` `RW 0x1`	`dmaif6` `RW 0x1`	`dmaif5` `RW 0x1`	`dmaif4` `RW 0x1`	`dmaif3` `RW 0x1`	`dmaif2` `RW 0x1`	`dmaif1` `RW 0x1`	`dmaif0` `RW 0x1`	`Reserved`	`emacptp` `RW 0x1`	`dmaocp` `RW 0x1`	`spis1` `RW 0x1`	`spis0` `RW 0x1`	`spim1` `RW 0x1`	`spim0` `RW 0x1`	`dma` `RW 0x1`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`sdmmcocp` `RW 0x1`	`qspiocp` `RW 0x1`	`nandocp` `RW 0x1`	`usb1ocp` `RW 0x1`	`usb0ocp` `RW 0x1`	`emac2ocp` `RW 0x1`	`emac1ocp` `RW 0x1`	`emac0ocp` `RW 0x1`	`sdmmc` `RW 0x1`	`qspi` `RW 0x1`	`nand` `RW 0x1`	`usb1` `RW 0x1`	`usb0` `RW 0x1`	`emac2` `RW 0x1`	`emac1` `RW 0x1`	`emac0` `RW 0x1`
`per1warmmask` `0x48`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`					`gpio2` `RW 0x1`	`gpio1` `RW 0x1`	`gpio0` `RW 0x1`	`Reserved`						`uart1` `RW 0x1`	`uart0` `RW 0x1`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`			`i2c4` `RW 0x1`	`i2c3` `RW 0x1`	`i2c2` `RW 0x1`	`i2c1` `RW 0x1`	`i2c0` `RW 0x1`	`Reserved`		`sptimer1` `RW 0x1`	`sptimer0` `RW 0x1`	`l4systimer1` `RW 0x1`	`l4systimer0` `RW 0x1`	`watchdog1` `RW 0x1`	`watchdog0` `RW 0x1`
`brgwarmmask` `0x4C`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`									`ddrsch` `RW 0x1`	`f2ssdram2` `RW 0x1`	`f2ssdram1` `RW 0x1`	`f2ssdram0` `RW 0x1`	`fpga2hps` `RW 0x1`	`lwhps2fpga` `RW 0x1`	`hps2fpga` `RW 0x1`
`syswarmmask` `0x50`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`									`ocramocp` `RW 0x1`	`sysdbg` `RW 0x1`	`s2f` `RW 0x1`	`fpgamgr` `RW 0x1`	`Reserved`	`ocram` `RW 0x1`	`rom` `RW 0x1`
`nrstwarmmask` `0x54`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`nrstpinoe` `RW 0x1`
`l3warmmask` `0x58`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`l3` `RW 0x1`
`tststa` `0x5C`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`									`dbgrstst` `RO 0x0`			`warmrstst` `RO 0x0`
`tstscratch` `0x60`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`fld0` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`fld0` `RW 0x0`
`hdsktimeout` `0x64`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`							`val` `RW 0x2800`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`val` `RW 0x2800`
`hmcintr` `0x68`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`intr` `RW 0x0`
`hmcintren` `0x6C`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`en` `RW 0x0`
`hmcintrens` `0x70`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`en` `RW 0x0`
`hmcintrenr` `0x74`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`															`en` `RW 0x0`
`hmcgpout` `0x78`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`								`out` `RW 0x0`
`hmcgpin` `0x7C`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`								`in` `RO 0x0`