tststa

         status fields used for testing the Reset Manager.
      
Module Instance Base Address Register Address
i_rst_mgr_rstmgr 0xFFD05000 0xFFD0505C

Offset: 0x5C

Access: RO

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.
Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reserved

dbgrstst

RO 0x0

warmrstst

RO 0x0

tststa Fields

Bit Name Description Access Reset
6:4 dbgrstst
debug reset control FSM state
RO 0x0
3:0 warmrstst
warm reset control FSM state
RO 0x0