MIPI CSI-2 Intel® FPGA IP User Guide

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ID 813926
Date 7/08/2024
Public
Document Table of Contents
Document Table of Contents x
1. About the MIPI CSI-2 Intel® FPGA IP 2. MIPI CSI-2 Intel® FPGA IP Interfaces 3. MIPI CSI-2 Intel® FPGA IP Parameters 4. Designing with the MIPI CSI-2 Intel® FPGA IP 5. MIPI CSI-2 Intel® FPGA IP Block Descriptions 6. Registers 7. Document Revision History for MIPI CSI-2 Intel® FPGA IP User Guide
1. About the MIPI CSI-2 Intel® FPGA IP x
1.1. MIPI CSI-2 Intel® FPGA IP Features 1.2. Device Family Support for MIPI CSI-2 Intel® FPGA IP 1.3. Recommended Speed Grades for MIPI CSI-2 IP 1.4. MIPI CSI-2 Intel® FPGA IP Performance and Resources 1.5. Release Information for MIPI CSI-2 Intel® FPGA IP
2. MIPI CSI-2 Intel® FPGA IP Interfaces x
2.1. MIPI CSI-2 Intel® FPGA IP Clocks 2.2. MIPI CSI-2 Intel® FPGA IP Resets 2.3. MIPI CSI-2 Intel® FPGA IP User Interfaces
2.3. MIPI CSI-2 Intel® FPGA IP User Interfaces x
2.3.1. Receiver PPI Signals 2.3.2. Avalon® Memory-Mapped Interface Control Interface Signals 2.3.3. Receiver AXI4-Stream Output Video Interface Signals 2.3.4. Receiver AXI4-Stream Output Passthrough Interface 2.3.5. Transmitter PPI Signals 2.3.6. Transmitter AXI4-Stream Input Video Interface Signals 2.3.7. Transmitter AXI4-Stream Input Passthrough Interface
4. Designing with the MIPI CSI-2 Intel® FPGA IP x
4.1. Generating the MIPI CSI-2 Intel® FPGA IP 4.2. MIPI CSI-2 Intel® FPGA IP Generation Output Quartus® Prime Pro Edition 4.3. MIPI CSI-2 Intel® FPGA IP Systems Integration and Implementation
4.2. MIPI CSI-2 Intel® FPGA IP Generation Output Quartus® Prime Pro Edition x
4.2.1. Files Generated for the MIPI CSI-2 IP and Platform Designer Systems
4.3. MIPI CSI-2 Intel® FPGA IP Systems Integration and Implementation x
4.3.1. D-PHY PPI Clock Frequencies 4.3.2. MIPI CSI-2 Receiver Clock Requirements 4.3.3. MIPI CSI-2 Transmitter Clock Requirements 4.3.4. Required Supporting IP 4.3.5. Limitations and Known Issues
5. MIPI CSI-2 Intel® FPGA IP Block Descriptions x
5.1. MIPI CSI-2 Receiver 5.2. MIPI CSI-2 Transmitter
6. Registers x
6.1. CSI-2 Receiver Register Map 6.2. CSI-2 Transmitter Register Map
1. About the MIPI CSI-2 Intel® FPGA IP
2. MIPI CSI-2 Intel® FPGA IP Interfaces
3. MIPI CSI-2 Intel® FPGA IP Parameters
4. Designing with the MIPI CSI-2 Intel® FPGA IP
5. MIPI CSI-2 Intel® FPGA IP Block Descriptions
6. Registers
7. Document Revision History for MIPI CSI-2 Intel® FPGA IP User Guide

3. MIPI CSI-2 Intel® FPGA IP Parameters

Table 17.  IP Core Parameters
Parameter Value Description
Direction RX, TX Select the port direction.
Video Interface Mode Video, Passthrough Select Video to decode received CSI-2 to AXI4-Stream video pixel data or transmit CSI-2 from AXI4-Stream video pixel data", Select Passthrough to interface using MIPI CSI-2 packets and disable packet encode or decode.
Buffer depth

128, 256, 512, 1024,

2048, 4096, 8192, 16384

Select the FIFO buffer depth. For the receiver, the value is in pixels. For the transmitter, this value is in bytes. In both cases, a recommended minimum value contains 2 video lines. This value may need to be higher depending on the backpressure of the your system.
Enable Scrambler/Descrambler On or off Turn on CSI-2 scrambling on transmitter or CSI-2 descrambling on receiver.
Number of lanes

1C & 1D, 1C & 2D, 1C & 4D, 1C & 8D

Select the number of D-PHY lanes. C indicates clock lane while D indicates Data lane count.
PPI bus width per lane 16 Select the PHY Protocol Interface (PPI) bus width bits per lane.
Pixels in parallel 1, 2, 4 Select the number of pixels in parallel at the video streaming interface.
Number of video streaming interfaces 1 – 4 Select the number of AXI-S video interfaces or CSI-2 virtual channels.
Support RAW6 On or off Turn on to support the RAW6 video data type.
Support RAW7 On or off Turn on to support the RAW7 video data type.
Support RAW8 On or off Turn on to support the RAW8 video data type.
Support RAW10 On or off Turn on to support the RAW10 video data type.
Support RAW12 On or off Turn on to support the RAW12 video data type.
Support RAW14 On or off Turn on to support the RAW14 video data type.
Support RAW16 On or off Turn on to support the RAW16 video data type.
Support RAW20 On or off Turn on to support the RAW20 video data type.
Support RAW24 On or off Turn on to support the RAW24 video data type.
Support YUV420 8-bit On or off Turn on to support YUV420 8-bit video data type.
Support YUV420 8-bit (legacy) On or off Turn on to support YUV420 8-bit legacy video data type.
Support YUV420 10-bit On or off Turn on to support YUV420 10-bit video data type.
Support YUV422 8-bit On or off Turn on to support YUV422 8-bit video data type.
Support YUV422 10-bit On or off Turn on to support YUV422 10-bit video data type.
Support RGB444 On or off Turn on to support the RGB444 video data type.
Support RGB555 On or off Turn on to support the RGB555 video data type.
Support RGB565 On or off Turn on to support the RGB565 video data type.
Support RGB666 On or off Turn on to support the RGB666 video data type.
Support RGB888 On or off Turn on to support the RGB888 video data type.
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