Intel® Simics® Simulator for Intel® FPGAs: User Guide

ID 784383
Date 7/08/2024
Public
Document Table of Contents

5.1.2. Understanding Target Scripts

After the selected virtual platform has been deployed, you must associate the target script (.simics file) associated to this platform in your project directory. The target script has the following main purposes:

  • Instantiate the components that integrate the virtual platform.
  • Define the parameter values for any of the modules that integrate the target system to be simulated.
  • Include the run time commands used to configure the simulation and control the flow.

Virtual Platform Architecture Philosophy

The intent of this exercise is to align the virtual platform closely with the architecture of the real platform. This also applies to the device that is being simulated for which the topology is described in the Golden Hardware Reference Design (GHRD) if available.

The GHRD, part of the Golden System Reference Design (GSRD), is an Quartus® Prime project that contains a full HPS design for the Intel® FPGA device. The GHRD has connections to a boot source, SDRAM memory, and other peripherals on the development board. The purpose of the hardware design is to configure the SoC, including the FPGA portion, HPS pin multiplexers and I/Os, and the DDRAM. All software projects depend on the hardware design. In the Intel® Simics® simulator environment, the virtual platform pretends to mimic this GHRD.

The following figure describes how the target script for a virtual platform is integrated:

Figure 4. Integration of Target Script

The components in the virtual platform are components described in Python language. The following table describes the main components in the virtual platform:

Table 7.  Virtual Platform Components
Component Description
qsys_top

Relates to the top view of the hardware design that is being modeled, and corresponds to the qsys_top component view in the Platform Designer under the GHRD (soc_inst instance). Under this component are instantiated other components, such as HPS (if available), FPGA design, individual IPs, and so on.

FPGA Component Relates to the top-level view of the hardware design (GHRD) that is being modeled from the FPGA device perspective corresponding to the Quartus® Prime project. It instantiates the qsys_top component (soc_inst) and may include any modeling not included as part of the qsys_top component, such as device interface signals pre/post processing.
Board component Represents the board model (PCB). It instantiates the FPGA component and all board-level components, such as SD Card, QSPI memory, and so on.
System component Represents the complete virtual platform system. It instantiates the board component. In the system component, it is expected to instantiate any component that is not part of the board, which may include other boards (same or different boards).
Target Script A wrapper in which the system component is instantiated. In this component, you can do the following:
  • Define the values of configurable parameters.
  • Perform initial setup.
  • Define any automation task over the simulation.

You can customize these components as necessary. You must customize before building the component with the make command.

By the time the simulation is launched using the target script (.simics file), the components instantiated in the target script are loaded and the behavioral functionality is started. The .simics file also implements the networking configuration. As mentioned earlier, arguments for some of the internal modules in the Intel® Simics® model are defined in the .simics file. You can manually update these arguments before launching the simulation, and arguments may include information about the image to load in a flash device or RAM, the address to load the image, and so on. The target script also includes run time commands that allows controlling the simulation flow, such as start running the simulation, create script branches, set breakpoints, and so on.