Intel® Simics® Simulator for Intel® FPGAs: User Guide

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ID 784383
Date 7/08/2024
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Document Table of Contents
Document Table of Contents x
1. About This Document 2. Intel® Simics® Simulator and Virtual Platforms 3. Intel® Simics® Simulator for Intel® FPGAs Device Portfolio 4. Installing the Intel® Simics® Simulator for Intel® FPGAs 5. Getting Started with Intel® Simics® Simulator 6. Debugging Target Software 7. Networking with the Simulated Target System 8. Intel® Simics® Scripting 9. Software Debug Examples with Intel® Simics® Simulator 10. Document Revision History for Intel® Simics® Simulator for Intel FPGAs User Guide A. Intel® Simics® Simulator Command Reference
1. About This Document x
1.1. Documentation Conventions for Examples 1.2. Terminology 1.3. List of Acronyms
2. Intel® Simics® Simulator and Virtual Platforms x
2.1. Device Model and Virtual Platforms 2.2. Intel® Simics® Simulator 2.3. Intel® Simics® Simulator Architecture
2.2. Intel® Simics® Simulator x
2.2.1. Intel® Simics® Simulator for Intel FPGAs Capabilities
4. Installing the Intel® Simics® Simulator for Intel® FPGAs x
4.1. Installing the Intel® Simics® Simulator for Intel® FPGAs on Linux* Systems 4.2. Installing the Intel® Simics® Simulator for Intel® FPGAs on Microsoft Windows* Systems 4.3. Installing Ashling* RiscFree* IDE for Intel® FPGAs 4.4. Intel® Simics® Simulator for Intel® FPGAs Support
5. Getting Started with Intel® Simics® Simulator x
5.1. Simulation Set Up 5.2. Starting the Simulation 5.3. Intel® Simics® Simulator Command-Line Interface (CLI) 5.4. Hardware Inspection 5.5. Intel® Simics® Simulator Timing
5.1. Simulation Set Up x
5.1.1. Initializing an Intel® Simics® Project and Deploying a Virtual Platform 5.1.2. Understanding Target Scripts
5.2. Starting the Simulation x
5.2.1. Starting a Simulation from a Command Prompt 5.2.2. Starting a Simulation with Ashling* RiscFree* IDE
5.3. Intel® Simics® Simulator Command-Line Interface (CLI) x
5.3.1. Version of the Intel® Simics® Simulator for Intel FPGAs Software 5.3.2. Simulation Run Control from CLI 5.3.3. Intel® Simics® Simulator Command Scope 5.3.4. Intel® Simics® Simulator CLI Variables and Operations 5.3.5. Intel® Simics® Simulator CLI Command Completion and Command History 5.3.6. Intel® Simics® Command-Line Interface Help 5.3.7. Capture of CLI Session to a File 5.3.8. Intel® Simics® Simulator File Location and Intel® Simics® Search Path
5.4. Hardware Inspection x
5.4.1. Listing Objects in the Target System 5.4.2. Processor (CPU) Inspection 5.4.3. Device Inspection 5.4.4. Memory Mapping and Memory Inspection 5.4.5. Logging
5.4.2. Processor (CPU) Inspection x
5.4.2.1. Listing Processors 5.4.2.2. Inspect Processor Registers
5.4.3. Device Inspection x
5.4.3.1. Retrieve List of Devices 5.4.3.2. Inspecting Device Registers
5.4.4. Memory Mapping and Memory Inspection x
5.4.4.1. Memory Mapping Inspection 5.4.4.2. Memory Inspection
5.4.5. Logging x
5.4.5.1. Breakpoints on CLI Log Messages
5.5. Intel® Simics® Simulator Timing x
5.5.1. CPU Frequency 5.5.2. CPU Cycles and Steps 5.5.3. Events 5.5.4. Enable Real Time
6. Debugging Target Software x
6.1. Intel® Simics® Debugger and Debug Context 6.2. Capturing Serial Console Output 6.3. Breakpoints 6.4. Debugging Target Software with Symbol Files 6.5. Debugging Target Software with Ashling* RiscFree* Debugger 6.6. Capturing CPU Instruction Execution Trace
6.3. Breakpoints x
6.3.1. Memory Breakpoints 6.3.2. Temporal Breakpoints 6.3.3. CPU Control Register Breakpoints 6.3.4. Hardware Access Breakpoints 6.3.5. CPU Register Breakpoints 6.3.6. Tracing Breakpoints 6.3.7. Text Console Activity Breakpoints
6.4. Debugging Target Software with Symbol Files x
6.4.1. Loading Symbol Files in a Simulation
6.5. Debugging Target Software with Ashling* RiscFree* Debugger x
6.5.1. Remote Debugging with RiscFree* IDE
6.5.1. Remote Debugging with RiscFree* IDE x
6.5.1.1. Remote Debugging With Intel® Simics® Simulation and RiscFree* IDE on the Same System 6.5.1.2. Remote Debugging With Intel® Simics® Simulation and RiscFree* IDE on Different Systems 6.5.1.3. Remote Access to the Target System Serial Console
7. Networking with the Simulated Target System x
7.1. Network Simulation and Service Node 7.2. Connectivity Between Host PC and Target System
7.2. Connectivity Between Host PC and Target System x
7.2.1. Port Forwarding 7.2.2. Transferring Files Between Host PC and Target System 7.2.3. Accessing Target System from Host PC Through HTTP 7.2.4. Networking Commands Reference Table
7.2.1. Port Forwarding x
7.2.1.1. Incoming Port Forwarding 7.2.1.2. Outgoing Port Forwarding
7.2.1.1. Incoming Port Forwarding x
7.2.1.1.1. Example of an SSH Connection with Incoming Port Forwarding
7.2.1.2. Outgoing Port Forwarding x
7.2.1.2.1. Example of SSH Connection With Outgoing Port Forwarding 7.2.1.2.2. Example of SSH Connection via NAPT
7.2.2. Transferring Files Between Host PC and Target System x
7.2.2.1. Transferring Files with SCP service 7.2.2.2. Transferring Files with TFTP service
7.2.2.1. Transferring Files with SCP service x
7.2.2.1.1. Transferring Files With SCP Service via Forwarding Ports 7.2.2.1.2. Transferring Files with SCP from Target System to Host PC via NAPT
7.2.2.2. Transferring Files with TFTP service x
7.2.2.2.1. TFTP Using Forwarding Port 7.2.2.2.2. TFTP via NAPT 7.2.2.2.3. TFTP Using TFTP Server in Intel® Simics® Service Node
8. Intel® Simics® Scripting x
8.1. Scripts in CLI
8.1. Scripts in CLI x
8.1.1. Variables 8.1.2. Command Return Values 8.1.3. Control Flow Commands 8.1.4. Local Variables 8.1.5. Integer Conversion 8.1.6. Accessing Configuration Parameters 8.1.7. Error Handling in Scripts 8.1.8. Script Branches
8.1.8. Script Branches x
8.1.8.1. Script Branches Commands 8.1.8.2. Variables in Script Branches 8.1.8.3. Branch Synchronization 8.1.8.4. Canceling Script Branches 8.1.8.5. Script Branches Restrictions
9. Software Debug Examples with Intel® Simics® Simulator x
9.1. Debugging Linux* User-Mode Application
9.1. Debugging Linux* User-Mode Application x
9.1.1. Debugging a Linux Application with GDB 9.1.2. Debugging a Linux Application with RiscFree* IDE
9.1.1. Debugging a Linux Application with GDB x
9.1.1.1. Debugging with GDB Debug from Host PC Using Forwarding Ports 9.1.1.2. Debugging with GDB from Host PC with Intel® Simics® Simulator GDB Server
1. About This Document
2. Intel® Simics® Simulator and Virtual Platforms
3. Intel® Simics® Simulator for Intel® FPGAs Device Portfolio
4. Installing the Intel® Simics® Simulator for Intel® FPGAs
5. Getting Started with Intel® Simics® Simulator
6. Debugging Target Software
7. Networking with the Simulated Target System
8. Intel® Simics® Scripting
9. Software Debug Examples with Intel® Simics® Simulator
10. Document Revision History for Intel® Simics® Simulator for Intel FPGAs User Guide
A. Intel® Simics® Simulator Command Reference

5.4.5.1. Breakpoints on CLI Log Messages

When inspecting hardware ( Intel® Simics® model of a component), sometimes it is useful to stop the simulation when a certain log message is observed in the CLI. For this, Intel® Simics® simulator provides the ability to define breakpoints that can be configured to trigger when a specific message is observed in the CLI. To this, use the following command: 

<bp-manager.log>.break [object] [-re]  ["substr"] [type] [-once]

You can use this command in several ways. For example:

  • You can define if you want to break when any specific object sends a message using the object argument.
  • You define a specific text for which you want to break using the substr argument.
  • You can use the -re argument to break on a regular expression.
  • You can specify if you want to break on a specific type of message (info, error, critical, etc) using the type argument.
  • You can indicate if you want to break only once with the -once argument. You can have any combination of these parameters to narrow down the messages list that can cause the trigger. If no argument is given, breaking on all logs is enabled.

The following capture shows some examples on you can use this command: 

#Intel Simics simulator CLI

simics> log-level -r "system.board.fpga.soc_inst.hps_subsys.agilex_hps.timer[0]” 4
[system.board.fpga.soc_inst.hps_subsys.agilex_hps.timer[0]] Changing log level recursively: 1 -> 4

simics> bp.log.break object="system.board.fpga.soc_inst.hps_subsys.agilex_hps.timer[0]"
Breakpoint 1: Break on '<all>' log messages from system.board.fpga.soc_inst.hps_subsys.agilex_hps.timer[0] hierarchy

simics> bp.list

---------------------------------------------------------------------
ID   Description	         Enabled Oneshot Ignore count  Hit count
---------------------------------------------------------------------
 1   Break on <all> log       true    false         0           0
     messages from
     system..._hps.timer[0] 
     hierarchy
---------------------------------------------------------------------

simics> run
[system.board.fpga.soc_inst.hps_subsys.agilex_hps.timer[0] info] Write to register aarch64.cntfrq <- 0x0000000017d78400
[system.board.fpga.soc_inst.hps_subsys.agilex_hps.timer[0]] Breakpoint 1: system.board.fpga.soc_inst.hps_subsys.agilex_hps.timer[0] log message of type <all>

simics> bp.list
---------------------------------------------------------------------
ID   Description	         Enabled Oneshot Ignore count  Hit count
---------------------------------------------------------------------
 1   Break on <all> log       true    false         0           1
     messages from
     system..._hps.timer[0] 
     hierarchy
---------------------------------------------------------------------

simics> bp.delete 1

simics> bp.log.break substr = "Write to register" -once
Breakpoint 2: Break on '<all>' log messages matching 'Write to register'

simics> bp.list
------------------------------------------------------------------
ID   Description	      Enabled Oneshot Ignore count  Hit count
------------------------------------------------------------------
 1   Break on <all> log    true    false       0           0
     messages matching 
     'Write to register' 
------------------------------------------------------------------

simics> run
[system.board.fpga.soc_inst.hps_subsys.agilex_hps.timer[0] info] Write to register aarch64.cntp.ctl <- 0x0000000000000003
[system.board.fpga.soc_inst.hps_subsys.agilex_hps.timer[0]] Breakpoint 2: system.board.fpga.soc_inst.hps_subsys.agilex_hps.timer[0] log message of type <all> matching 'Write to register'

simics> bp.list

----------------------------------------------------------------
ID   Description	    Enabled Oneshot Ignore count  Hit count
----------------------------------------------------------------
----------------------------------------------------------------

In the previous example, you are following the next sequence:

  • Start increasing the log level of messages under the system.board.fpga.soc_inst.hps_subsys.agilex_hps.timer[0] object using the log-level -r command.
  • A breakpoint is set for any of the log messages displayed by the system.board.fpga.soc_inst.hps_subsys.agilex_hps.timer[0] object. Use the bp.list command to list all the breakpoints set at that time. This indicates that you have only one breakpoint with an ID = 1. The breakpoint is enabled and the Hit count is 0.
  • The simulation is run and this stops when you see in the CLI an message displayed by the above object. Here, you call again the bp.list command, the breakpoint is still enabled, and the Hit count is now 1.
  • The breakpoint is deleted using the bp.delete command using the ID = 1.
  • A new breakpoint is created, this time the trigger condition is any message that includes the "Write to read-only field” string. This time, the -once flag is used, so after triggering, this breakpoint must not be enabled anymore. The bp.list command is called again, and you see that the ID of this is 1. The breakpoint with ID = 1 is no longer on the list. Also, observe that the OneShot field is in true this time and the Hit count is 0.
  • The simulation is run again, and it stops when the string is displayed in the CLI. Here, you list all the breakpoints with the bp.list command and you see that the breakpoints in no longer in the list because of the use of -once configuration which removes the breakpoint after the trigger.
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