Intel® Simics® Simulator for Intel® FPGAs: User Guide

ID 784383
Date 7/08/2024
Public
Document Table of Contents

6.3.1. Memory Breakpoints

A memory breakpoint stops the simulation whenever a memory location in a specified address interval is accessed. The address interval can be of arbitrary length and the type of memory access can be specified as any combination of read, write, and execute. The command used to set a memory breakpoint is the following:

bp.memory.break [object] address [length][-r][-w][-
x]["prefix"]["substr"]["pattern"]["mask"] [-once] 
Table 19.  Memory Breakpoint Command Options
Argument Description
address

Access address that generates the breakpoint trigger. The address can be physical or virtual. To indicate the type of address:

  • p:<address> is for physical
  • v:<address> is for virtual.
length Range of memory that generates the breakpoint trigger starting from address argument.
-r -w -x Memory access type that generates the breakpoint trigger (read, write or execution). Any combination of these is allowed. By default, execution is selected if none of the arguments is provided.
“prefix" Break on instructions with this prefix. For example, a prefix "add" causes the breakpoint to only stop if the instruction begins with "add". The match is case insensitive.
“substr” Break on instructions with a certain syntax substring. For example, specifying a substring "r31" causes the breakpoint to stop only if the instruction contains the substring "r31". The match is case insensitive.
“pattern” “mask” Break on instructions with a certain bit-pattern. First, the mask is applied to the instruction and then, the result is compared with the pattern. For example, a pattern "0x0100" and mask "0x0101" causes the breakpoint to stop only on instructions whose first byte has the lowest bit set and the second not.
-once This causes the breakpoint to automatically be removed after it has triggered.

An example of the use of breakpoint on memory is shown in the next capture. In the example, the memory access to trigger the breakpoint must be done from the software target software. In this case, the u-boot prompt is used to generate memory accesses.

#Intel Simics simulator CLI  

running> bp.memory.break -w p:0xffe00000 -once 
Breakpoint 1: break on 'w' access to 0xffe00000 in system…agilex_hps.cpu_mem[0] 

running> bp.memory.break -r p:0xffe00000  
Breakpoint 2: break on 'r' access to 0xffe00000 in system…agilex_hps.cpu_mem[0] 
Note: overlaps with breakpoint 1 

running> bp.list 
------------------------------------------------------------------------------
ID                  Description                   Enabled    Oneshot Hit count 
------------------------------------------------------------------------------
1  system...cpu_mem[0] .. addr=0xffe .. access=w) true       true      0          
2  system...cpu_mem[0] .. addr=0xffe .. access=r) true       false     0 
------------------------------------------------------------------------------

[agilex.hps.cpu_mem[0]] Breakpoint 2: agilex.hps.cpu_mem[0] 'r' access to p:0xffe00000 len=4 
simics> bp.list
------------------------------------------------------------------------------
ID                  Description                   Enabled    Oneshot Hit count 
------------------------------------------------------------------------------
1  system...cpu_mem[0] .. addr=0xffe .. access=w) true       true              
2  system...cpu_mem[0] .. addr=0xffe .. access=r) true       false      1 
------------------------------------------------------------------------------

simics> r 
[system…agilex_hps.cpu_mem[0]] Breakpoint 1: system…agilex_hps.cpu_mem[0] 
'w' access to p:0xffe00000 len=4 val=0xcafecafe 

simics> bp.list
------------------------------------------------------------------------------
ID  Description                                   Enabled    Oneshot Hit count 
------------------------------------------------------------------------------
2  system...cpu_mem[0] .. addr=0xffe .. access=r) true       false      2 
------------------------------------------------------------------------------

simics> bp.delete 2 
simics> bp.list
------------------------------------------------------------
ID  Description   Enabled  Oneshot  Ignore Count  Hit count
------------------------------------------------------------ 
------------------------------------------------------------

In the capture above, the following actions are done:

  • A breakpoint is being set at physical memory address 0xFFE00000 on write access. The –once flag is being set, meaning that once it triggers, it is deleted.
  • A second breakpoint is being set also at physical memory address 0xFFE00000 on read access. The breakpoints are listed and it shows the two breakpoints added. Both breakpoints show their hit count is 0.
  • In the target software, a read operation on the 0xFFE00000 address is being generated. This makes the second breakpoint to trigger, and the simulation gets stopped. The breakpoints are listed, and you notice that the hit counter for the second breakpoint is now 1.
  • The simulation is run again and this time, a write operation to the 0xFFE00000 is being generated in the target software. This makes the first breakpoint to trigger, and the simulation gets stopped. The breakpoints are listed, and this time, the breakpoint 1 is no longer in the list as this was removed due to the –once flag.
  • The simulation is run again. In the target software, a new read operation on the 0xFFE00000 address is being generated. This makes the second breakpoint to trigger, and the simulation gets stopped. The breakpoints are listed, and you notice that the hit counter for the second breakpoint is now 2.
  • You delete second breakpoint and when breakpoints get listed, this does not show any breakpoint this time.
Note: The memory breakpoint can also be set using directly the memory space name. As an example of this, the following commands also create breakpoints on memory accesses:
#Intel Simics simulator CLI 

simics> system.board.fpga.soc_inst.hps_subsys.agilex_hps.phys_mem.bp-break-memory 0xffe00000 -w
Breakpoint 3: break on 'w' access to 0xffe00000 in agilex.hps.cpu_mem[0]

simics> system.board.fpga.soc_inst.hps_subsys.agilex_hps.cpu_mem[0].bp-break-memory 0xffe00000 -r 
Breakpoint 4: break on 'r' access to 0xffe00000 in system.board.fpga.soc_inst.hps_subsys.agilex_hps.phys_mem