Multi Channel DMA Intel® FPGA IP for PCI Express* User Guide

ID 683821
Date 7/30/2024
Public
Document Table of Contents

4. Interface Overview

Interfaces for the Multi Channel DMA IP for PCI Express are:
  • Clocks
  • Resets
  • Multi Channel DMA mode interfaces (EP only):
    • Avalon-MM PIO Master Interface
    • Avalon-MM Write Master Interface
    • Avalon-MM Read Master Interface
    • Avalon-ST Source Interface
    • Avalon-ST Sink Interface
    • User MSI-X
    • User FLR
  • Bursting Avalon-MM Master Interface (BAM)
  • Bursting Avalon-MM Slave Interface (BAS)
  • MSI Interface (in BAS mode & BAM+BAS mode for EP H/P/F/R-Tile MCDMA IP)
  • Config Slave Interface (RP only)
  • Hard IP Reconfig Interface
  • Config TL Interface
  • Data Mover Mode (available in MCDMA P-Tile, R-Tile and F-Tile IPs)