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Ixiasoft
1.1. Installing and Licensing Intel® FPGA IP Cores
1.2. Design Flow
1.3. Upgrading IP Cores
1.4. Floating-Point IP Cores General Features
1.5. IEEE-754 Standard for Floating-Point Arithmetic
1.6. Non-IEEE-754 Standard Format
1.7. Floating-Points IP Cores Output Latency
1.8. VHDL Component Declaration
1.9. VHDL LIBRARY-USE Declaration
3.1. Floating Point Functions IP Features
3.2. Floating Point Functions IP Output Latency
3.3. Floating Point Functions IP Target Frequency
3.4. Floating Point Functions IP Combined Target
3.5. Floating Point Functions IP Reset and Latency
3.6. Floating Point Functions IP Signals
3.7. Floating-Point Functions IP Parameters
Visible to Intel only — GUID: eis1410936966508
Ixiasoft
1. About Floating-Point Intel® FPGA IP
Updated for: |
---|
Intel® Quartus® Prime Design Suite 24.2 |
For ALTFP IPs in Quartus® Prime Standard Edition, refer to earlier versions of the Floating-Point IP Cores User Guide
IP Name | Function Overview | Supported Devices |
---|---|---|
Floating Point Functions Intel® FPGA IP | A collection of floating-point functions. This IP replaces all other floating-point IPs listed in the Quartus Prime Standard Edition table for devices available in Quartus® Prime Pro Edition software. |
|
Floating Point Custom Accumulator Intel® FPGA IP | An application specific accumulator |
Section Content
Installing and Licensing Intel FPGA IP Cores
Design Flow
Upgrading IP Cores
Floating-Point IP Cores General Features
IEEE-754 Standard for Floating-Point Arithmetic
Non-IEEE-754 Standard Format
Floating-Points IP Cores Output Latency
VHDL Component Declaration
VHDL LIBRARY-USE Declaration