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1.1. Release Information for Remote Update Intel® FPGA IP
1.2. Avalon® Memory-Mapped Interface in Remote Update Intel® FPGA IP
1.3. Arria® 10 and Cyclone® 10 GX Devices
1.4. Arria II, Arria V, Cyclone V, Stratix IV, and Stratix V Devices
1.5. Cyclone IV and Intel Cyclone 10 LP Devices
1.6. Flash Memory Programming Files
1.7. Design Examples
1.8. Remote Update Intel® FPGA IP User Guide Archives
1.9. Document Revision History for the Remote Update Intel® FPGA IP User Guide
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1.7.1. Intel Arria 10 Remote Update Design Example
This Arria® 10 design example uses the Avalon® memory-mapped interface. Intel uses the following hardware and software to create the design example:
- Quartus® Prime Version: 15.0
- Arria® 10 Development Kit with 10AX115S3F45I2SGE2 FPGA Device
Follow these steps to perform the design example tasks:
- Unzip the contents of the design example to your working directory on your PC.
- Convert the three .sof files into one .jic by using Convert Programming File. On the File Menu, click Convert Programming Files and select the details as shown below:
- Programming File type: JTAG Indirect Configuration File (.jic).
- Select Configuration Device: EPCQL1024.
- Mode: Active Serial.
- Set the file name you your desired location.
- Flash loader: click add device and choose 10AX115S2E2.
- SOFT DATA PAGE_0: click Add File and select the factory image with start address set to <auto>.
- SOFT DATA PAGE_1: click Add File and select the application image file with start address 0x2000000. Compression is enabled for this application image file.
- SOFT DATA PAGE_2: click Add File and select the application image file with start address 0x4000000. Compression is enabled for this application image file.
- Click Generate.
- Click OK when the dialog box of .jic file successfully generated appears.
- Please follow the steps below to run the simple design:
- After programming the .jic file, power cycle the board, all LEDs are lighted up. It indicates you are currently at factory image.
- Go to system console and direct to the directory where your FI_SysConsole_try.tcl is located. Type source FI_SysConsole_try.tcl.
Only one LED is lighted up which indicates successfully go to application image 1. After the watchdog timeout, all LEDs are lighted up and go back to factory image.Note: To go to application image 2 directly form the factory image, comment out the write boot address to App1 and uncomment the write boot address App2 in the FI_SysConsole_try.tcl file. - Setting Boot Page Selection for design with more than one SOF page:
- To select the boot page, click the Option/Boot Info button in Convert Programming File.
- In the Active Serial Boot Info window, select the page available from the Boot from page drop down menu. By default, the page number is set at page_0.
- For application to application image, change the page number to page_1 or page_2.