F-Tile Interlaken Intel® FPGA IP User Guide

ID 683622
Date 7/08/2024
Public
Document Table of Contents

4.1.2.3. RX Errored Packet Handling

The Interlaken IP Core provides information about errored packets on the RX user data transfer interface through the following output signals:

  • irx_eopbits[3:0]—If this signal has the value of 4'b0001, an error indication arrived with the packet on the incoming Interlaken link: the EOP_Format field of the control word following the final burst of the packet on the Interlaken link has this value, which indicates an error and EOP.
  • irx_err— The Interlaken IP Core checks the integrity of incoming packets on the Interlaken link, and reports some packet corruption errors it detects on the RX user data transfer interface in the irx_err output signal. The IP core asserts the irx_err output signal synchronously with the irx_eob signal. The IP core asserts this signal only if it can determine the burst in which the error occurred. If the IP core cannot determine the burst in which the error occurred, it does not assert the irx_err in response.

In both cases, the application is responsible for discarding the relevant packet.

The irx_err signal reflects CRC24 errors that are associated with a data or control burst and is aligned with irx_eob.

The irx_err signal indicates where an error occurs. The IP core asserts this signal only if an error occurs in an identifiable burst. Corruption can occur at the SOP of the current packet, in some later cycle in the payload of the current packet, in a packet that is interleaved with the current packet, or in the current EOP cycle. However, the IP core asserts the irx_err signal only in a subset of these cases, If the current EOP cycle data is corrupted so badly that the EOP indication is missing, or if an error occurs during an idle cycle, the IP core does not assert the irx_err signal.

For CRC24 errors, you should use the crc24_err status signal, rather than relying on the irx_err signal, in the following situations:

  • If you monitor the link when only idle control words are being received (no data is flowing), you should monitor the real time status signal crc24_err.
  • If you maintain a count of CRC24 errors, you should monitor the number of times that the real time status signal crc24_err is asserted.