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5.1. F-Tile Interlaken IP Clock and Reset Interface Signals
5.2. F-Tile Interlaken IP Transmit User Interface Signals
5.3. F-Tile Interlaken IP Receive User Interface Signals
5.4. F-Tile Interlaken IP Management Interface Signals
5.5. F-Tile Interlaken IP Reconfiguration Interface Signals
5.6. F-Tile Interlaken Link and Miscellaneous Signals
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8. Document Revision History for F-Tile Interlaken Intel FPGA IP User Guide
Document Version | Quartus® Prime Version | IP Version | Changes |
---|---|---|---|
2024.07.08 | 24.2 | 8.1.0 |
|
2024.03.31 | 23.4 | 8.0.0 |
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2023.12.04 | 23.4 | 8.0.0 |
|
2023.10.02 | 23.3 | 7.1.0 |
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2023.08.04 | 23.2 | 7.0.0 | Updated the ordering code in the F-Tile Interlaken Intel FPGA IP Core Release Information table. |
2023.06.26 | 23.2 | 7.0.0 |
|
2023.04.30 | 23.1 | 6.1.0 |
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2022.12.22 | 22.4 | 6.0.0 |
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2022.09.26 | 22.3 | 5.0.0 |
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2022.06.21 | 22.2 | 4.1.0 |
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2022.03.28 | 22.1 | 4.0.0 |
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2022.01.14 | 21.4 | 3.1.0 |
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2021.10.04 | 21.3 | 3.0.0 |
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2021.06.21 | 21.2 | 2.0.0 | Initial release. |