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Ixiasoft
5.1. F-Tile Interlaken IP Clock and Reset Interface Signals
5.2. F-Tile Interlaken IP Transmit User Interface Signals
5.3. F-Tile Interlaken IP Receive User Interface Signals
5.4. F-Tile Interlaken IP Management Interface Signals
5.5. F-Tile Interlaken IP Reconfiguration Interface Signals
5.6. F-Tile Interlaken Link and Miscellaneous Signals
Visible to Intel only — GUID: hbt1614291464639
Ixiasoft
4.1.1. Interlaken TX Path
The Interlaken IP core accepts application data from up to 256 channels and combines it into a single data stream in which data is labeled with its source channel. The Interlaken TX MAC and PCS blocks format the data into protocol-compliant bursts and insert Idle words where required.