Visible to Intel only — GUID: kpx1614291493571
Ixiasoft
Visible to Intel only — GUID: kpx1614291493571
Ixiasoft
4.1.2.1. Receive Path Blocks
- RX PMA
- RX PCS
- RX MAC
- RX Regroup Block
- RX PMA
- RX PCS
- RX MAC
- RX Regroup Block
RX PMA
The Interlaken IP RX PMA deserializes data that the IP receives on the serial lines of the Interlaken link. The RX PMA contains RS FEC block in PAM4 mode of F-Tile devices and three RS FEC (544,514) blocks in 6x 53.125 Gbps PAM4 mode configuration. Each RS FEC block serves four FEC channels in the aggregate mode.
RX PCS
- Detects word lock and word synchronization.
- Checks running disparity.
- Reverses gear-boxing and 64/67B encoding.
- Descrambles the data.
- Delineates meta frame boundaries.
- Performs CRC32 checking.
- Sends lane status information to the calendar and status blocks, if Include in-band flow control functionality is turned on.
- Performs asynchronous operations and receiver alignment using RX Align FIFO.
- Performs the Interlaken inverse transcoding function on the data received from the RX RS FEC (544, 514) in PAM4 mode IP variations.
RX MAC
- Data de-striping, including lane alignment and burst assembly from the PCS lanes.
- CRC24 validation.
- Calendar recovery, if Include in-band flow control functionality is turned on.
RX Regroup Block
The Interlaken IP RX regroup block translates the IP internal data format to the outgoing user application data irx_dout_words format.
For details on transceiver initialization, please refer to the F-Tile Architecture PHY IP User Guide.