Low Latency 40-Gbps Ethernet Intel® FPGA IP User Guide: Stratix® 10

ID 683600
Date 5/31/2024
Public
Document Table of Contents

4.1.2.1. IP Core Preamble Processing

If you turn on Enable preamble passthrough in the parameter editor, the RX MAC forwards preamble bytes. The TX MAC requires the preamble bytes to be included in the frames at the Avalon® Streaming interface.

If you turn off Enable preamble passthrough, the IP core removes the preamble bytes. l2_rx_startofpacket is aligned to the MSB of the destination address.

Note that a single parameter in the Stratix® 10 LL 40GbE parameter editor turns on both RX and TX preamble passthrough.