Agilex™ 7 FPGAs and SoCs Device Overview

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ID 683458
Date 10/09/2024
Public
Document Table of Contents
Document Table of Contents x
1. Overview of the Agilex™ 7 FPGAs and SoCs 2. Agilex™ 7 FPGAs and SoCs Family Plan 3. Second Generation Hyperflex® Core Architecture 4. Adaptive Logic Module in Agilex™ 7 FPGAs and SoCs 5. Internal Embedded Memory in Agilex™ 7 FPGAs and SoCs 6. Variable-Precision DSP in Agilex™ 7 FPGAs and SoCs 7. Core Clock Network in Agilex™ 7 FPGAs and SoCs 8. General Purpose I/Os in Agilex™ 7 FPGAs and SoCs 9. I/O PLLs in Agilex™ 7 FPGAs and SoCs 10. External Memory Interface in Agilex™ 7 FPGAs and SoCs 11. Hard Processor System in Agilex™ 7 SoCs 12. Heterogeneous 3D SiP Transceivers in Agilex™ 7 FPGAs and SoCs 13. Heterogeneous 3D Stacked HBM2E DRAM Memory in Agilex™ 7 FPGAs and SoCs M-Series 14. High-Performance Crypto Blocks in Agilex™ 7 FPGAs and SoCs F-Series and I-Series 15. Configuration via Protocol Using PCIe* for Agilex™ 7 FPGAs and SoCs 16. Device Configuration and the SDM in Agilex™ 7 FPGAs and SoCs 17. Partial and Dynamic Configuration of Agilex™ 7 FPGAs and SoCs 18. Device Security for Agilex™ 7 FPGAs and SoCs 19. SEU Error Detection and Correction in Agilex™ 7 FPGAs and SoCs 20. Power Management for Agilex™ 7 FPGAs and SoCs 21. Software and Tools for Agilex™ 7 FPGAs and SoCs 22. Revision History for the Agilex™ 7 FPGAs and SoCs Device Overview
1. Overview of the Agilex™ 7 FPGAs and SoCs x
1.1. Key Features and Innovations in Agilex™ 7 FPGAs and SoCs 1.2. Agilex™ 7 FPGAs and SoCs Block Diagram 1.3. Agilex™ 7 FPGAs and SoCs Summary of Features 1.4. Additional Features for Agilex™ 7 SoCs
2. Agilex™ 7 FPGAs and SoCs Family Plan x
2.1. Agilex™ 7 FPGAs and SoCs F-Series 2.2. Agilex™ 7 FPGAs and SoCs I-Series 2.3. Agilex™ 7 FPGAs and SoCs M-Series 2.4. Part Number Decoder
10. External Memory Interface in Agilex™ 7 FPGAs and SoCs x
10.1. External Memory Interface Performance 10.2. Features of the Hard Memory Controller
12. Heterogeneous 3D SiP Transceivers in Agilex™ 7 FPGAs and SoCs x
12.1. E-Tile Transceivers 12.2. P-Tile Transceivers 12.3. F-Tile Transceivers 12.4. R-Tile Transceivers
12.1. E-Tile Transceivers x
12.1.1. PMA Features in E-Tile Transceivers 12.1.2. PCS Features in E-Tile Transceivers
1. Overview of the Agilex™ 7 FPGAs and SoCs
2. Agilex™ 7 FPGAs and SoCs Family Plan
3. Second Generation Hyperflex® Core Architecture
4. Adaptive Logic Module in Agilex™ 7 FPGAs and SoCs
5. Internal Embedded Memory in Agilex™ 7 FPGAs and SoCs
6. Variable-Precision DSP in Agilex™ 7 FPGAs and SoCs
7. Core Clock Network in Agilex™ 7 FPGAs and SoCs
8. General Purpose I/Os in Agilex™ 7 FPGAs and SoCs
9. I/O PLLs in Agilex™ 7 FPGAs and SoCs
10. External Memory Interface in Agilex™ 7 FPGAs and SoCs
11. Hard Processor System in Agilex™ 7 SoCs
12. Heterogeneous 3D SiP Transceivers in Agilex™ 7 FPGAs and SoCs
13. Heterogeneous 3D Stacked HBM2E DRAM Memory in Agilex™ 7 FPGAs and SoCs M-Series
14. High-Performance Crypto Blocks in Agilex™ 7 FPGAs and SoCs F-Series and I-Series
15. Configuration via Protocol Using PCIe* for Agilex™ 7 FPGAs and SoCs
16. Device Configuration and the SDM in Agilex™ 7 FPGAs and SoCs
17. Partial and Dynamic Configuration of Agilex™ 7 FPGAs and SoCs
18. Device Security for Agilex™ 7 FPGAs and SoCs
19. SEU Error Detection and Correction in Agilex™ 7 FPGAs and SoCs
20. Power Management for Agilex™ 7 FPGAs and SoCs
21. Software and Tools for Agilex™ 7 FPGAs and SoCs
22. Revision History for the Agilex™ 7 FPGAs and SoCs Device Overview

12. Heterogeneous 3D SiP Transceivers in Agilex™ 7 FPGAs and SoCs

The Agilex™ 7 FPGA product family offers low-latency power-efficient transceivers optimized for a wide variety of applications. These FPGA transceivers support bandwidth capacities ranging from 1 Gbps to 32 Gbps NRZ, 2 Gbps to 58 Gbps PAM4, and 116 Gbps PAM4.

Intel implements the Agilex™ 7 FPGA transceivers on heterogeneous 3D system-in-package (SiP) tiles, providing flexibility and scalability for current and future data rates, modulation schemes, and protocol IPs.

Figure 14. Core Fabric and Heterogeneous 3D SiP Transceiver Tiles


Table 28.  Availability of Transceiver Types in Agilex™ 7 FPGAs and SoCs
Series Transceiver Type
E-Tile P-Tile F-Tile R-Tile
F-Series Yes Yes Yes —
I-Series — — Yes Yes
M-Series — — Yes Yes
Table 29.  Capabilities of the Different FPGA Transceiver Types
Tile Type General Description Maximum Data Rate and Channel Count Hardened IP Applications
E-Tile General purpose transceiver 12× 58 Gbps PAM4 or 24× 28.9 Gbps NRZ
  • 10/25/100 GbE MAC, PCS and RS-FEC (528,514)
  • RS-FEC (544,514)
  • General purpose transceivers
  • Multi-protocol support for CEI, Ethernet, CPRI, FlexE, Interlaken, Fibre Channel, SRIO, Serial Lite, OTN, JESD204B/C, FlexO, IEEE1588
P-Tile PCIe* 4.0 transceiver 16× 16 Gbps NRZ 16× PCIe* 4.0 with 8 PF/2K VF SR-IOV EP/RP
  • PCIe* 4.0 x16
  • Port bifurcation support for 2×8 EP or 4×4 RP
  • CvP, autonomous HIP, SR-IOV 8PF/2kVF, VirtIO, scalable IOV, and shared virtual memory
F-Tile General purpose and PCIe* 4.0 transceiver 4×116 Gbps PAM4, 12× 58 Gbps PAM4, or 16× 32 Gbps NRZ
  • 10/25/40/50/ 100/200/400 GbE MAC, PCS, and KR/KP RS-FEC
  • 16× PCIe* 4.0 with 8 PF/2K VF SR-IOV EP/RP
  • General purpose transceivers
  • Multi-protocol support for CEI, Ethernet, CPRI, FlexE, 300G Interlaken, fibre channel, SRIO, Serial Lite, OTN, JESD204B/C, IEEE1588, FlexO, GPON, SDI, Vby1, HDMI, CvP, Display Port
  • Includes P-Tile PCIe* 4.0 features plus precise time management and PMA direct mode
R-Tile PCIe* 5.0 and CXL* transceiver 16×32 Gbps NRZ
  • 16× PCIe* 5.0 with 8 PF/2K VF SR-IOV EP/RP
  • 16× CXL*
  • PCIe* 5.0 x16
  • Port bifurcation support for 2x8/4×4 EP or 4x4 RP
  • CvP, autonomous HIP, SR-IOV 8PF/2kVF, VirtIO, scalable IOV, and shared virtual memory
  • Separate header and payload interfaces on user interface
  • Precise time management and PIPE direct
  • CXL* 1.1 and 2.0 support for applications that need cache and memory coherency to achieve low latency and high bandwidth for FPGA-based discrete accelerator use-cases

Section Content
E-Tile Transceivers
P-Tile Transceivers
F-Tile Transceivers
R-Tile Transceivers

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