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1. Overview of the Agilex™ 7 FPGAs and SoCs
2. Agilex™ 7 FPGAs and SoCs Family Plan
3. Second Generation Hyperflex® Core Architecture
4. Adaptive Logic Module in Agilex™ 7 FPGAs and SoCs
5. Internal Embedded Memory in Agilex™ 7 FPGAs and SoCs
6. Variable-Precision DSP in Agilex™ 7 FPGAs and SoCs
7. Core Clock Network in Agilex™ 7 FPGAs and SoCs
8. General Purpose I/Os in Agilex™ 7 FPGAs and SoCs
9. I/O PLLs in Agilex™ 7 FPGAs and SoCs
10. External Memory Interface in Agilex™ 7 FPGAs and SoCs
11. Hard Processor System in Agilex™ 7 SoCs
12. Heterogeneous 3D SiP Transceivers in Agilex™ 7 FPGAs and SoCs
13. Heterogeneous 3D Stacked HBM2E DRAM Memory in Agilex™ 7 FPGAs and SoCs M-Series
14. High-Performance Crypto Blocks in Agilex™ 7 FPGAs and SoCs F-Series and I-Series
15. Configuration via Protocol Using PCIe* for Agilex™ 7 FPGAs and SoCs
16. Device Configuration and the SDM in Agilex™ 7 FPGAs and SoCs
17. Partial and Dynamic Configuration of Agilex™ 7 FPGAs and SoCs
18. Device Security for Agilex™ 7 FPGAs and SoCs
19. SEU Error Detection and Correction in Agilex™ 7 FPGAs and SoCs
20. Power Management for Agilex™ 7 FPGAs and SoCs
21. Software and Tools for Agilex™ 7 FPGAs and SoCs
22. Revision History for the Agilex™ 7 FPGAs and SoCs Device Overview
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Ixiasoft
12.3. F-Tile Transceivers
The F-Tile transceivers are general purpose transceivers.
Features of the F-Tile transceivers:
- Speed options:
- Four channels of 116 Gbps PAM4 or 58 Gbps NRZ
- 12 channels of 58 Gbps PAM4 or 16 channels of 32 Gbps NRZ
- Hard IP support for Ethernet and PCIe*
- Other protocols support:
- Multiprotocol support for CEI, Ethernet, CPRI, FlexE, 300 Gbps Interlaken, fibre channel, SR-IOV, SerialLite IV, OTN, JESD204B, JESD204C, FlexO, IEEE1588, GPON, SDI, Vby1, HDMI, and Display Port
- PCIe* 4.0 ×16 support with P-Tile feature set, Precise Time Management, and PMA Direct mode
- Configuration via protocol (CvP)