Serial Lite III Streaming Stratix® 10 FPGA IP Design Example User Guide

ID 683341
Date 5/23/2024
Public
Document Table of Contents

5.3.3. Clocking Scheme

The following diagram shows the clocking scheme for the design example.
Figure 43. Clocking Scheme for Stratix® 10 E-tile Serial Lite III Streaming Duplex Core in Advanced Clocking Mode