Visible to Intel only — GUID: bif1475826313768
Ixiasoft
1. Quick Start Guide
2. Detailed Description for Stratix® 10 H-tile and L-tile Serial Lite III Streaming Standard Clocking Mode Design Example
3. Detailed Description for Stratix® 10 H-tile and L-tile Serial Lite III Streaming Advanced Clocking Mode Design Example
4. Detailed Description for Stratix® 10 E-tile Serial Lite III Streaming Standard Clocking Mode Design Example
5. Detailed Description for Stratix® 10 E-tile Serial Lite III Streaming Advanced Clocking Mode Design Example
6. Serial Lite III Streaming Stratix® 10 FPGA IP Design Example User Guide Archives
7. Document Revision History for Serial Lite III Streaming Stratix® 10 FPGA IP Design Example User Guide
Visible to Intel only — GUID: bif1475826313768
Ixiasoft
4.2. Hardware and Software Requirements
Intel uses the following hardware and software to test the example designs in a Linux system:
- Quartus® Prime software
- ModelSim* , QuestaSim* , Xcelium* , or VCS* / VCS* MX simulator
- Stratix® 10 TX Signal Integrity Development Kit (1ST280EY1F55E1VGS1) for hardware testing
Note: To target the Stratix® 10 E-tile device with the Stratix® 10 TX Signal Integrity development kit, make sure to select E-Tile for the Transceiver Tile parameter in the IP tab.