Visible to Intel only — GUID: QSF-IMPLEMENTS_FREE_RUNNING_CLOCK
Ixiasoft
Visible to Intel only — GUID: QSF-IMPLEMENTS_FREE_RUNNING_CLOCK
Ixiasoft
IMPLEMENTS_FREE_RUNNING_CLOCK
Specifies if timing analysis should consider if a node implements a free-running clock versus assuming the node implement a clock that could be arbitrarily gated. The setting has implications on how end-of-life effects are applied.
Type
Boolean
Device Support
- This setting can be used in projects targeting any Intel FPGA device family.
Notes
This assignment supports wildcards.
This assignment is copied to any duplicated nodes.
This assignment supports Fitter wildcards.
This assignment is included in the Fitter report.
The value of this assignment must be a node name.
Syntax
set_instance_assignment -name IMPLEMENTS_FREE_RUNNING_CLOCK -to <to> -entity <entity name> <value>