Quartus® Prime Pro Edition Settings File Reference Manual

ID 683296
Date 4/01/2024
Public

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ADV_NETLIST_OPT_ALLOWED

Specifies whether the Compiler should perform advanced netlist optimizations, such as gate-level retiming or physical synthesis, on the specified node or entity. If this option is set to 'Default', the Compiler duplicates, moves, or changes the synthesis of the node or entity, or allows register retiming during netlist optimization, only if doing so does not negatively affect the timing or performance of the design. If this option is set to 'Always Allow', the Compiler can alter the node or entity, even if doing so affects the timing or performance of the design. Intel does not recommend using this setting. If this option is set to 'Never Allow' the Compiler cannot alter the node or entity.

Type

Enumeration

Values

  • Always Allow
  • Default
  • Never Allow

Device Support

  • Intel Agilex® 5
  • Intel Agilex® 7
  • Arria® 10
  • Cyclone® 10 GX
  • Stratix® 10

Notes

This assignment supports synthesis wildcards.

Syntax

set_global_assignment -name ADV_NETLIST_OPT_ALLOWED -entity <entity name> <value>
set_instance_assignment -name ADV_NETLIST_OPT_ALLOWED -to <to> -entity <entity name> <value>

Example

set_instance_assignment -name adv_netlist_opt_allowed "always allow" -to reg