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1. Power Distribution Network Design Guidelines
2. Power Delivery Overview
3. Board Power Delivery Network Recommendations
4. Board LC Recommended Filters for Noise Reduction in Combined Power Delivery Rails
5. PCB PDN Design Guideline for Unused GTS Transceiver
6. PCB Voltage Regulator Recommendation for PCB Power Rails
7. Board Power Delivery Network Simulations
8. Agilex™ 5 Device Family PDN Design Summary
9. Document Revision History for the Power Distribution Network Design Guidelines: Agilex™ 5 FPGAs and SoCs
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2.3.1. Power Nets
This section describes the Agilex™ 5 device family power nets and their subsystem details along with their board-level connection based on the recommended power trees described in the Power Tree section.
For more detailed board-level connection specification, refer to the Pin Connection Guidelines: Agilex™ 5 FPGAs and SoCs.
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