Agilex™ 7 Clocking and PLL User Guide: M-Series

ID 769001
Date 7/25/2024
Public
Document Table of Contents

2.2.6.4. Normal Compensation Mode

An internal clock in normal compensation mode is phase-aligned to the input clock pin. The external clock output pin has a phase delay relative to the clock input pin if connected in this mode. The Quartus® Prime Timing Analyzer reports any phase difference between the two. In normal compensation mode, the delay introduced by the clock network is fully compensated. Only one output clock can be compensated in normal compensation mode.

Figure 14. Example of Phase Relationship Between the PLL Clocks in Normal Compensation Mode