Nios® V Embedded Processor Design Handbook

ID 726952
Date 10/31/2022
Public

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Document Table of Contents

1.2. Intel® Quartus® Prime Software Support

Intel® Quartus® Prime Standard Edition software has the same features as Intel® Quartus® Prime Pro Edition software with exception on features below:

  • Provide the SOPCINFO file (.sopcinfo) to the --qsys argument when creating the Board Support Package (BSP).
  • Run the niosv-bsp-editor command to invoke the Board Support Package Editor GUI.
  • Utilize the following tools to generate the example design:
    Tools Steps
    Graphical User Interface
    1. Search for Nios V/m Processor Intel FPGA IP in IP Catalog.
    2. Click Add and create a dummy Platform Designer system.
    3. Select one of the available options.
    Command Line Interface
    1. Enter the following command to generate a Nios® V Processor Example Design from Platform Designer:
      ip-generate --component-name=intel_niosv_m --file-set=<design name>
      Linux*:
      <quartus_install>/quartus/sopc_builder/bin/ip-generate
      Windows*:
      <quartus_install>\quartus\sopc_builder\bin\ip-generate.exe
    Table 1.   Nios® V Processor Device Support
    Nios® V Processor Intel® Quartus® Prime Standard Edition Intel® Quartus® Prime Pro Edition
    Software version 22.1 22.3
    IP version 1.0.0 22.3.0
    Device support
    • Control-block based device
      • Intel® MAX® 10
      • Intel® Cyclone® IV E
      • Intel® Cyclone® IV GX
      • Intel® Cyclone® V
      • Intel® Cyclone® 10 LP
      • Intel® Arria® 10
      • Intel® Arria® II GX
      • Intel® Arria® II GZ
      • Intel® Arria® V
      • Intel® Arria® V GZ
      • Intel® Stratix® IV
      • Intel® Stratix® V
    • Control-block based device
      • Intel® Cyclone® 10 GX
      • Intel® Arria® 10
    • SDM-based device
      • Intel® Stratix® 10
      • Intel® Agilex™
    Documentation Refer to the Related Information. Refer to the latest documentations according to the Intel® Quartus® Prime Pro Edition software and IP version.