Visible to Intel only — GUID: frr1630479148632
Ixiasoft
1. About the Nios® V Embedded Processor
2. Nios® V Processor Hardware System Design with Intel® Quartus® Prime Software and Platform Designer
3. Nios® V Processor Software System Design
4. Nios® V Processor Configuration and Booting Solutions
5. Nios® V Processor - Using the MicroC/TCP-IP Stack
6. Nios® V Processor Debugging, Verifying, and Simulating
7. Nios® V Processor — Remote System Update
8. Nios® V Embedded Processor Design Handbook Archives
9. Document Revision History for the Nios® V Embedded Processor Design Handbook
4.1. Introduction
4.2. Linking Applications
4.3. Nios® V Processor Booting Methods
4.4. Introduction to Nios® V Processor Booting Methods
4.5. Nios® V Processor Booting from Configuration QSPI Flash
4.6. Nios V Processor Booting from On-Chip Memory (OCRAM)
4.7. Summary of Nios® V Processor Vector Configuration and BSP Settings
6.4.1. Prerequisites
6.4.2. Setting Up and Generating Your Simulation Environment in Platform Designer
6.4.3. Creating Nios V Processor Software
6.4.4. Generating Memory Initialization File
6.4.5. Generating System Simulation Files
6.4.6. Running Simulation in the QuestaSim Simulator Using Command Line
Visible to Intel only — GUID: frr1630479148632
Ixiasoft
1.4.2.2. Generating the Nios® V/m Processor Example Design Using the Command-Line Interface
Alternatively, you can generate the example design system with the following commands:
- Launch the Nios® V Command Shell.
<Intel Quartus Prime installation directory>/niosv/bin/niosv-shell
- Generate the example design.
ip-deploy --component-name=intel_niosv_m --family=Arria10 --output-name=niosv_m.ip
qsys-generate niosv_m.ip --example_design=niosv_m.hello_world_example_design
unzip <Design ZIP file>
- Generate the Platform Designer system.
qsys-script --script=create_qsys.tcl --quartus-project=top.qpf
- Perform the hardware compilation.
quartus_sh --flow compile top