Nios® V Embedded Processor Design Handbook

ID 726952
Date 10/31/2022
Public

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

2.2.1. Instantiating the Nios® V Processor System Module in the Intel® Quartus® Prime Project

The Platform Designer generates a system module design entity in which you can use to instantiate in Intel® Quartus® Prime. How you instantiate the system module depends on the design entry method for the overall Intel® Quartus® Prime project. For example, if you were using Verilog HDL for design entry, instantiate the Verilog based system module and if you prefer to use the block diagram method for design entry, instantiate a system module symbol .bdf file.