F-Tile Dynamic Reconfiguration Suite Intel® FPGA IP User Guide

ID 711009
Date 4/03/2023
Public

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

6.21. Dynamic Reconfiguration Next Profile 19

Table 36.   dyn_rcfg_dr_next_profile_19_reg
Offset 0x50
Addressing Mode 32-bits
Description Dynamic reconfiguration control and status register.

Refer to dyn_rcfg_dr_next_profile_2_reg register.