F-Tile Dynamic Reconfiguration Suite Intel® FPGA IP User Guide

ID 711009
Date 4/03/2023
Public

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

6.19. Dynamic Reconfiguration Next Profile 17

Table 34.   dyn_rcfg_dr_next_profile_17_reg
Offset 0x48
Addressing Mode 32-bits
Description Dynamic reconfiguration control and status register.

Refer to dyn_rcfg_dr_next_profile_2_reg register.