Stratix® 10 High-Speed LVDS I/O User Guide

ID 683792
Date 7/08/2024
Public
Document Table of Contents

3.1. PLLs and Clocking for Stratix® 10 Devices

To generate the parallel clocks (rx_coreclock and tx_coreclock) and high-speed clocks (fast_clock), the Stratix® 10 devices provide I/O PLLs in the high-speed differential I/O receiver and transmitter channels.