Visible to Intel only — GUID: mwh1409958594633
Ixiasoft
1.1. Terminology
1.2. An Example of a Partial Reconfiguration Design
1.3. Partial Reconfiguration Modes
1.4. Partial Reconfiguration Design Flow
1.5. Freeze Logic for PR Regions
1.6. Implementation Details for Partial Reconfiguration
1.7. Example of a Partial Reconfiguration Design with an External Host
1.8. Example Partial Reconfiguration with an Internal Host
1.9. Partial Reconfiguration Project Management
1.10. Programming Files for a Partial Reconfiguration Project
1.11. On-Chip Debug for PR Designs
1.12. Partial Reconfiguration Known Limitations
1.13. Document Revision History
1.10.2.1. Generating a .pmsf File from a .msf and .sof Input File
1.10.2.2. Generating a .rbf File from a .pmsf Input File
1.10.2.3. Create a Merged .msf File from Multiple .msf Files
1.10.2.4. Generating a Merged .pmsf File from Multiple .pmsf Files
1.10.2.5. Enable Partial Reconfiguration Bitstream Decompression when Configuring Base Design SOF file in JTAG mode
1.10.2.6. Enable Bitstream Decryption Option
Visible to Intel only — GUID: mwh1409958594633
Ixiasoft
1.13. Document Revision History
Date |
Version |
Changes |
---|---|---|
2017.11.06 | 17.1.0 |
|
2015.11.02 | 15.1.0 | Changed instances of Quartus II to Intel® Quartus® Prime . |
2015.05.04 | 15.0.0 |
|
2015.12.15 | 14.1.0 | Minor revisions to some topics to resolve design refinements:
|
June 2014 | 14.0.0 | Minor updates to "Programming File Sizes for a Partial Reconfiguration Project" and code samples in "Freeze Logic for PR Regions" sections. |
November 2013 |
13.1.0 |
Added support for merging multiple .msf and .pmsf files. Added support for PR Megafunction. Updated for revisions on timing requirements. |
May 2013 |
13.0.0 |
Added support for encrypted bitstreams. Updated support for double PR. |
November 2012 |
12.1.0 |
Initial release. |
Related Information