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1.1. Terminology
1.2. An Example of a Partial Reconfiguration Design
1.3. Partial Reconfiguration Modes
1.4. Partial Reconfiguration Design Flow
1.5. Freeze Logic for PR Regions
1.6. Implementation Details for Partial Reconfiguration
1.7. Example of a Partial Reconfiguration Design with an External Host
1.8. Example Partial Reconfiguration with an Internal Host
1.9. Partial Reconfiguration Project Management
1.10. Programming Files for a Partial Reconfiguration Project
1.11. On-Chip Debug for PR Designs
1.12. Partial Reconfiguration Known Limitations
1.13. Document Revision History
1.10.2.1. Generating a .pmsf File from a .msf and .sof Input File
1.10.2.2. Generating a .rbf File from a .pmsf Input File
1.10.2.3. Create a Merged .msf File from Multiple .msf Files
1.10.2.4. Generating a Merged .pmsf File from Multiple .pmsf Files
1.10.2.5. Enable Partial Reconfiguration Bitstream Decompression when Configuring Base Design SOF file in JTAG mode
1.10.2.6. Enable Bitstream Decryption Option
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1.4.3.2. Instantiating the PR Control Block and CRC Block in VHDL
This code example instantiates a PR control block in VHDL, inside your top-level project, Chip_Top:
entity Chip_Top is port (
--User I/O signals (excluding PR related signals)
..
..
);
end Chip_Top;
-- Following shows the architecture behavior of Chip_Top
m_pr : stratixv_prblock
port map(
clk => dclk,
corectl =>'0', --1 - when using PR from inside
--0 - for PR from pins; You must also enable
-- the appropriate option in
Intel®
Quartus® Prime settings
prrequest => pr_request,
data => pr_data,
error => pr_error,
ready => pr_ready,
done => pr_done
);
m_crc : stratixv_crcblock
port map(
shiftnld => '1', --If you want to read the EMR register when
clk => dummy_clk, --error occurrs, refer to AN539 for the
--connectivity forthis signal. If you only want
--to detect CRC errors, but plan to take no
--further action, you can tie the shiftnld
--signal to logical high.
crcerror => crc_error
);
For more information on port connectivity for reading the Error Message Register (EMR), refer to the following application note.