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Ixiasoft
Visible to Intel only — GUID: mwh1409958530088
Ixiasoft
1.3.3. Programming File Sizes for a Partial Reconfiguration Project
A partial reconfiguration programming bitstream for AND/OR mode makes two passes on the PR region; the first pass clears all relevant bits, and the second pass sets the necessary bits. Due to this two-pass sequence, the size of a partial bitstream can be larger than a full FPGA programming bitstream depending on the size of the PR region.
When using the AND/OR mode for partial reconfiguration, the formula which describes the approximate file size within ten percent is:
PR bitstream size = ((Size of region in the horizontal direction) /(full horizontal dimension of the part)) * 2 * (size of full bitstream)The way the Fitter reserves routing for partial reconfiguration increases the effective size for small PR regions from a bitstream perspective. PR bitstream sizes in designs with a single small PR region will not match the file size computed by this equation.
Turn on Partial reconfiguration, Reserved, Enabled, and Constrain routing to stay within region boundaries.
You can also control expansion of the routing regions by adding the following two assignments to your Intel® Quartus® Prime Settings file (.qsf):
set_global_assignment -name LL_ROUTING_REGION Expanded -section_id <region name> set_global_assignment -name LL_ROUTING_REGION_EXPANSION_SIZE 0 -section_id <region name>Adding these to your .qsf disables expansion and minimizes the bitstream size.