JESD204B Intel® FPGA IP User Guide

ID 683442
Date 7/19/2024
Public
Document Table of Contents

2.6. Channel Bonding

The JESD204B IP supports channel bonding—bonded (PMA bonding for Agilex™ 7, Stratix® 10, Arria® 10, and Cyclone® 10 GX) and non-bonded modes.

The channel bonding mode that you select may contribute to the transmitter channel-to-channel skew. A bonded transmitter datapath clocking provides low channel-to-channel skew as compared to non-bonded channel configurations.

For Stratix® 10 L-tile and H-tile, Arria® 10, and Cyclone® 10 GX devices, refer to PMA Bonding chapter of the respective Transceiver PHY User Guides , about how to connect the ATX PLL and fPLL in bonded configuration and non-bonded configuration. For the non-bonded configuration, refer to Implementing Multi-Channel xN Non-Bonded Configuration. For bonded configuration, refer to Implementing x6/xN Bonding Mode.

  • In PHY-only mode, you can generate up to 32 channels, provided that the channels are on the same side. In MAC and PHY integrated mode, you can generate up to 8 channels.
    Note: The maximum channels of 32 is for configuration simplicity. Refer to the Intel® FPGA Transceiver PHY User Guide for the actual number of channels supported.
  • In bonded channel configuration, the lower transceiver clock skew for all channels result in a lower channel-to-channel skew.
    • For Stratix V, Arria V, and Cyclone V devices, you must use contiguous channels when you select bonded mode. The JESD204B IP automatically selects between ×6, ×N or feedback compensation (fb_compensation) bonding depending on the number of transceiver channels you set.
    • For Arria® 10, Cyclone® 10 GX, and Stratix® 10 L-tile and H-tile devices, you do not have to place the channels in bonded group contiguously. Refer to Clock Network Selection for Bonded Mode for the clock network selection. Refer to Channel Bonding section of the respective Transceiver PHY User Guides for more information about PMA Bonding.
    • For Agilex™ 7 and Stratix® 10 E-tile devices, you must use contiguous channels to enable channel bonding with NRZ PMA transceiver channels.
  • In non-bonded channel configuration, the transceiver clock skew is higher and latency is unequal in the transmitter phase compensation FIFO for each channel. This may result in a higher channel-to-channel skew.
Table 6.   Maximum Number of Lanes (L) Supported in Bonded and Non-Bonded Mode
Device Family Core Variation Bonding Mode Configuration Maximum Number of Lanes (L)

Agilex™ 7

Stratix® 10

Arria® 10

Cyclone® 10 GX

Stratix V

Arria V GZ

Cyclone V

PHY only Bonded 32 2
Non-bonded 32 2
MAC and PHY Bonded 8
Non-bonded 8
Arria V PHY only Bonded 32 2
Non-bonded 32 2
MAC and PHY Bonded 6
Non-bonded 8
Table 7.  Clock Network Selection for Bonded Mode
Note: The clock network selection is not applicable for Stratix® 10 E-tile devices.
Device Family L ≤ 6 L > 6

Stratix® 10 L-tile and H-tile

Arria® 10

Cyclone® 10 GX

×6 ×N 3
Stratix V ×6 Feedback compensation
Arria V ×N ×N
Arria V GZ ×6 Feedback compensation
Cyclone V ×N ×N
2 The maximum lanes listed here is for configuration simplicity. Refer to the Intel® FPGA Transceiver PHY User Guides for the actual number of channels supported.
3 Bonded mode is not supported for data rate > 15 Gbps. Refer to the respective datasheet for the maximum data rate and channel span supported by the ×N clock network and the transceiver power supply operating condition for your device.